From patchwork Mon Mar 19 08:45:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 887610 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="Q0Tb5LUr"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 404V9005Qyz9sWJ for ; Mon, 19 Mar 2018 19:48:51 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 82486C21E1B; Mon, 19 Mar 2018 08:47:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id F324DC21DB6; Mon, 19 Mar 2018 08:45:44 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id EA342C21DF9; Mon, 19 Mar 2018 08:45:36 +0000 (UTC) Received: from mail-pl0-f68.google.com (mail-pl0-f68.google.com [209.85.160.68]) by lists.denx.de (Postfix) with ESMTPS id EEE3EC21E26 for ; Mon, 19 Mar 2018 08:45:28 +0000 (UTC) Received: by mail-pl0-f68.google.com with SMTP id f5-v6so9791824plj.13 for ; Mon, 19 Mar 2018 01:45:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sHSe5pHZcfr1xyFWmen8J8pj9kunwncEeZ3upcmCsps=; b=Q0Tb5LUrO7H2ppGWGc/JBiCjBdknZPwA3cY6ecaUAU9Q5ksxu5I9L3iOjSnE8dP5cv PM4Nk27Sl3z/nXiBGKyp8w8opbsMfuBaqlg8Pe0pTv22bYWBpitxeaal1Xt5f9gfKmw0 nukLzc7xu6RoufJ0WmoluRfTz7rDhj8BBR+Dw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sHSe5pHZcfr1xyFWmen8J8pj9kunwncEeZ3upcmCsps=; b=J7DF2Q1FOc4IjdOs8gPe67bWDMDOnXrg9wm39kZW+azyDkHdYQ8kyrx/Iq8308GLn1 U7vtHK0wluHDuGTciuvTWKSJEfY7ZnmBHZpPIWAdwiVUX3suOQx4KqMDNYZ15eh+adHP 4n/tclhhhyY62JuJ958TmBXz+ekIToStIU+AlTGOa4kSgCG5dsSCxvSDMeG343zhqVXR ThRpY+bSrv0x90A8MPkzFwF0lFcyojqcLyGgFbZSXFMrlp0TQkUorgyY37bGApRn2EU3 E7urpKzT1cYG2cZFF9ZYDkyorfd0dTaqfzYvvGrbSx9NsaKgUTJB4KR0uinXG4BbGhwC nKUg== X-Gm-Message-State: AElRT7FaKn9DNiKFvLfw1MRsdQhSRm+E0z7wKERlRm+PPI3PY4eT5P6Z Y5Q4T4fmSjvoj7ZiWhgvk2dFug== X-Google-Smtp-Source: AG47ELsC4QhwGK9lNonDV4CaVqnKrx8ZurNDHbTMi352ZEONyXD34FpCo533NOpgyeCzSwjJp21fqw== X-Received: by 2002:a17:902:bd09:: with SMTP id p9-v6mr11612665pls.68.1521449127485; Mon, 19 Mar 2018 01:45:27 -0700 (PDT) Received: from localhost.localdomain ([115.97.190.51]) by smtp.gmail.com with ESMTPSA id h2sm12880092pfd.119.2018.03.19.01.45.25 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Mar 2018 01:45:27 -0700 (PDT) From: Jagan Teki To: Stefano Babic Date: Mon, 19 Mar 2018 14:15:02 +0530 Message-Id: <20180319084503.28054-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180319084503.28054-1-jagan@amarulasolutions.com> References: <20180319084503.28054-1-jagan@amarulasolutions.com> Cc: Fabio Estevam , u-boot@lists.denx.de Subject: [U-Boot] [PATCH 4/5] ARM: dts: i.MX6UL: U-Boot specific dts for u-boot, dm-spl X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" u-boot,dm-spl property is specific to U-Boot, so move it into *u-boot.dtsi files for relevant i.MX6UL files. This make syncing Linux dts files straight forward. Also update the MAINTAINERS file for dts files. Signed-off-by: Jagan Teki --- arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi | 25 ++++++++++++++++++++++ arch/arm/dts/imx6ul-geam-kit.dts | 4 ---- arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi | 17 +++++++++++++++ arch/arm/dts/imx6ul-isiot-emmc.dts | 2 -- arch/arm/dts/imx6ul-isiot-u-boot.dtsi | 18 ++++++++++++++++ arch/arm/dts/imx6ul-isiot.dtsi | 2 -- arch/arm/dts/imx6ul-u-boot.dtsi | 32 ++++++++++++++++++++++++++++ arch/arm/dts/imx6ul.dtsi | 6 ------ board/engicam/imx6ul/MAINTAINERS | 5 +++++ board/logicpd/imx6/mx6q_2x_MT41K512M16HA.cfg | 6 +++--- 10 files changed, 100 insertions(+), 17 deletions(-) create mode 100644 arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi create mode 100644 arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi create mode 100644 arch/arm/dts/imx6ul-isiot-u-boot.dtsi create mode 100644 arch/arm/dts/imx6ul-u-boot.dtsi diff --git a/arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi b/arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi new file mode 100644 index 0000000000..d1b77ba295 --- /dev/null +++ b/arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2018 Jagan Teki + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6ul-u-boot.dtsi" + +&usdhc1 { + u-boot,dm-spl; +}; + +&iomuxc { + pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + u-boot,dm-spl; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + u-boot,dm-spl; + }; +}; diff --git a/arch/arm/dts/imx6ul-geam-kit.dts b/arch/arm/dts/imx6ul-geam-kit.dts index 15e3f94153..07c21cb0a2 100644 --- a/arch/arm/dts/imx6ul-geam-kit.dts +++ b/arch/arm/dts/imx6ul-geam-kit.dts @@ -87,7 +87,6 @@ }; &usdhc1 { - u-boot,dm-spl; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>; @@ -135,7 +134,6 @@ }; pinctrl_usdhc1: usdhc1grp { - u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 @@ -147,7 +145,6 @@ }; pinctrl_usdhc1_100mhz: usdhc1grp100mhz { - u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 @@ -159,7 +156,6 @@ }; pinctrl_usdhc1_200mhz: usdhc1grp200mhz { - u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 diff --git a/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi b/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi new file mode 100644 index 0000000000..2d9dc11daa --- /dev/null +++ b/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2018 Jagan Teki + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6ul-isiot-u-boot.dtsi" + +&usdhc2 { + u-boot,dm-spl; +}; + +&iomuxc { + pinctrl_usdhc2: usdhc2grp { + u-boot,dm-spl; + }; +}; diff --git a/arch/arm/dts/imx6ul-isiot-emmc.dts b/arch/arm/dts/imx6ul-isiot-emmc.dts index a611e3bba5..677de96473 100644 --- a/arch/arm/dts/imx6ul-isiot-emmc.dts +++ b/arch/arm/dts/imx6ul-isiot-emmc.dts @@ -50,7 +50,6 @@ }; &usdhc2 { - u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; @@ -61,7 +60,6 @@ &iomuxc { pinctrl_usdhc2: usdhc2grp { - u-boot,dm-spl; fsl,pins = < MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17070 MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x10070 diff --git a/arch/arm/dts/imx6ul-isiot-u-boot.dtsi b/arch/arm/dts/imx6ul-isiot-u-boot.dtsi new file mode 100644 index 0000000000..e2eaa92030 --- /dev/null +++ b/arch/arm/dts/imx6ul-isiot-u-boot.dtsi @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2018 Jagan Teki + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6ul-u-boot.dtsi" +#include "imx6ul-isiot.dtsi" + +&usdhc1 { + u-boot,dm-spl; +}; + +&iomuxc { + pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; + }; +}; diff --git a/arch/arm/dts/imx6ul-isiot.dtsi b/arch/arm/dts/imx6ul-isiot.dtsi index 5007a88f45..9a3c35c56a 100644 --- a/arch/arm/dts/imx6ul-isiot.dtsi +++ b/arch/arm/dts/imx6ul-isiot.dtsi @@ -82,7 +82,6 @@ }; &usdhc1 { - u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; @@ -129,7 +128,6 @@ }; pinctrl_usdhc1: usdhc1grp { - u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 diff --git a/arch/arm/dts/imx6ul-u-boot.dtsi b/arch/arm/dts/imx6ul-u-boot.dtsi new file mode 100644 index 0000000000..0ff025ebce --- /dev/null +++ b/arch/arm/dts/imx6ul-u-boot.dtsi @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2018 Jagan Teki + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/ { + soc { + u-boot,dm-spl; + + aips1: aips-bus@02000000 { + u-boot,dm-spl; + + gpio1: gpio@0209c000 { + u-boot,dm-spl; + }; + + gpio4: gpio@020a8000 { + u-boot,dm-spl; + }; + + iomuxc: iomuxc@020e0000 { + u-boot,dm-spl; + }; + }; + + aips2: aips-bus@02100000 { + u-boot,dm-spl; + + }; + }; +}; diff --git a/arch/arm/dts/imx6ul.dtsi b/arch/arm/dts/imx6ul.dtsi index 7affab866f..def5f8cac9 100644 --- a/arch/arm/dts/imx6ul.dtsi +++ b/arch/arm/dts/imx6ul.dtsi @@ -134,7 +134,6 @@ compatible = "simple-bus"; interrupt-parent = <&gpc>; ranges; - u-boot,dm-spl; pmu { compatible = "arm,cortex-a7-pmu"; @@ -186,7 +185,6 @@ #size-cells = <1>; reg = <0x02000000 0x100000>; ranges; - u-boot,dm-spl; spba-bus@02000000 { compatible = "fsl,spba-bus", "simple-bus"; @@ -417,7 +415,6 @@ #interrupt-cells = <2>; gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>, <&iomuxc 16 33 16>; - u-boot,dm-spl; }; gpio2: gpio@020a0000 { @@ -454,7 +451,6 @@ interrupt-controller; #interrupt-cells = <2>; gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>; - u-boot,dm-spl; }; gpio5: gpio@020ac000 { @@ -653,7 +649,6 @@ iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6ul-iomuxc"; reg = <0x020e0000 0x4000>; - u-boot,dm-spl; }; gpr: iomuxc-gpr@020e4000 { @@ -734,7 +729,6 @@ #size-cells = <1>; reg = <0x02100000 0x100000>; ranges; - u-boot,dm-spl; usbotg1: usb@02184000 { compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; diff --git a/board/engicam/imx6ul/MAINTAINERS b/board/engicam/imx6ul/MAINTAINERS index 73dbec88e2..88db309aec 100644 --- a/board/engicam/imx6ul/MAINTAINERS +++ b/board/engicam/imx6ul/MAINTAINERS @@ -8,7 +8,12 @@ F: configs/imx6ul_geam_nand_defconfig F: configs/imx6ul_isiot_emmc_defconfig F: configs/imx6ul_isiot_mmc_defconfig F: configs/imx6ul_isiot_nand_defconfig +F: arch/arm/dts/imx6ul.dtsi +F: arch/arm/dts/imx6ul-u-boot.dtsi F: arch/arm/dts/imx6ul-geam-kit.dts +F: arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi F: arch/arm/dts/imx6ul-isiot.dtsi +F: arch/arm/dts/imx6ul-isiot-u-boot.dtsi F: arch/arm/dts/imx6ul-isiot-emmc.dts +F: arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi F: arch/arm/dts/imx6ul-isiot-nand.dts diff --git a/board/logicpd/imx6/mx6q_2x_MT41K512M16HA.cfg b/board/logicpd/imx6/mx6q_2x_MT41K512M16HA.cfg index a75746161e..bfa86492c8 100644 --- a/board/logicpd/imx6/mx6q_2x_MT41K512M16HA.cfg +++ b/board/logicpd/imx6/mx6q_2x_MT41K512M16HA.cfg @@ -31,9 +31,9 @@ BOOT_OFFSET FLASH_OFFSET_STANDARD #define __ASSEMBLY__ #include -#include "asm/arch-mx6/mx6-ddr.h" -#include "asm/arch-mx6/iomux.h" -#include "asm/arch-mx6/crm_regs.h" +#include "asm/arch-imx6/mx6-ddr.h" +#include "asm/arch-imx6/iomux.h" +#include "asm/arch-imx6/crm_regs.h" DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000