From patchwork Wed Mar 7 21:52:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 882820 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=nic.cz Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; secure) header.d=nic.cz header.i=@nic.cz header.b="wwy40sD0"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zxSHt2dYMz9sgw for ; Thu, 8 Mar 2018 09:00:26 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 130A6C21E79; Wed, 7 Mar 2018 21:57:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4A326C21FB3; Wed, 7 Mar 2018 21:55:09 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 1B991C21C4A; Wed, 7 Mar 2018 21:55:03 +0000 (UTC) Received: from mail.nic.cz (mail.nic.cz [217.31.204.67]) by lists.denx.de (Postfix) with ESMTPS id 7B15FC21E5B for ; Wed, 7 Mar 2018 21:55:03 +0000 (UTC) Received: from dellmb.labs.office.nic.cz (unknown [IPv6:2001:1488:fffe:6:8982:ed8c:62b1:c0c8]) by mail.nic.cz (Postfix) with ESMTP id 326F662640; Wed, 7 Mar 2018 22:55:03 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=nic.cz; s=default; t=1520459703; bh=NkdGYEffRTZJ5Rs9ByuTHnReX9xVSvCWYLN8aUfjiWs=; h=From:To:Date; b=wwy40sD0RtDeutiVDkm5z0Wgym/angCfdGXXhVceLTBPwuOFslL85wHdClkoPoace 1EihLPu48fRy4D1N2O5M6icDM/WbvbAU5v74Gchaponlz3oEQeDfVTLpKnlt6D5TG+ yXgmfNUeaIjwR7V+ZSwI6bITVSrh+ZNSy2nww76E= From: =?utf-8?q?Marek_Beh=C3=BAn?= To: u-boot@lists.denx.de Date: Wed, 7 Mar 2018 22:52:02 +0100 Message-Id: <20180307215216.10418-6-marek.behun@nic.cz> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180307215216.10418-1-marek.behun@nic.cz> References: <20180307215216.10418-1-marek.behun@nic.cz> X-Virus-Scanned: clamav-milter 0.99.2 at mail X-Virus-Status: Clean Cc: Tomas Hlavacek , Stefan Roese Subject: [U-Boot] [PATCH v1 05/19] phy: marvell: a3700: Use (!ret) instead of (ret == 0) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Signed-off-by: Marek Behun Reviewed-by: Stefan Roese --- drivers/phy/marvell/comphy_a3700.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c index d283604e1a..734d4e55b1 100644 --- a/drivers/phy/marvell/comphy_a3700.c +++ b/drivers/phy/marvell/comphy_a3700.c @@ -215,7 +215,7 @@ static int comphy_pcie_power_up(u32 speed, u32 invert) rb_txdclk_pclk_en, /* value */ rb_txdclk_pclk_en, /* mask */ POLL_16B_REG); /* 16bit */ - if (ret == 0) + if (!ret) printf("Failed to lock PCIe PLL\n"); debug_exit(); @@ -284,7 +284,7 @@ static int comphy_sata_power_up(void) bs_pll_ready_tx, /* value */ bs_pll_ready_tx, /* mask */ POLL_32B_REG); /* 32bit */ - if (ret == 0) + if (!ret) printf("Failed to lock SATA PLL\n"); debug_exit(); @@ -412,7 +412,7 @@ static int comphy_usb3_power_up(u32 type, u32 speed, u32 invert) rb_txdclk_pclk_en, /* value */ rb_txdclk_pclk_en, /* mask */ POLL_16B_REG); /* 16bit */ - if (ret == 0) + if (!ret) printf("Failed to lock USB3 PLL\n"); /* @@ -492,7 +492,7 @@ static int comphy_usb2_power_up(u8 usb32) rb_usb2phy_pllcal_done, /* value */ rb_usb2phy_pllcal_done, /* mask */ POLL_32B_REG); /* 32bit */ - if (ret == 0) + if (!ret) printf("Failed to end USB2 PLL calibration\n"); /* Assert impedance calibration done */ @@ -500,7 +500,7 @@ static int comphy_usb2_power_up(u8 usb32) rb_usb2phy_impcal_done, /* value */ rb_usb2phy_impcal_done, /* mask */ POLL_32B_REG); /* 32bit */ - if (ret == 0) + if (!ret) printf("Failed to end USB2 impedance calibration\n"); /* Assert squetch calibration done */ @@ -508,7 +508,7 @@ static int comphy_usb2_power_up(u8 usb32) rb_usb2phy_sqcal_done, /* value */ rb_usb2phy_sqcal_done, /* mask */ POLL_32B_REG); /* 32bit */ - if (ret == 0) + if (!ret) printf("Failed to end USB2 unknown calibration\n"); /* Assert PLL is ready */ @@ -517,7 +517,7 @@ static int comphy_usb2_power_up(u8 usb32) rb_usb2phy_pll_ready, /* mask */ POLL_32B_REG); /* 32bit */ - if (ret == 0) + if (!ret) printf("Failed to lock USB2 PLL\n"); debug_exit(); @@ -765,7 +765,7 @@ static int comphy_sgmii_power_up(u32 lane, u32 speed, u32 invert) rb_pll_ready_tx | rb_pll_ready_rx, /* value */ rb_pll_ready_tx | rb_pll_ready_rx, /* mask */ POLL_32B_REG); /* 32bit */ - if (ret == 0) + if (!ret) printf("Failed to lock PLL for SGMII PHY %d\n", lane); /* @@ -787,7 +787,7 @@ static int comphy_sgmii_power_up(u32 lane, u32 speed, u32 invert) rb_rx_init_done, /* value */ rb_rx_init_done, /* mask */ POLL_32B_REG); /* 32bit */ - if (ret == 0) + if (!ret) printf("Failed to init RX of SGMII PHY %d\n", lane); debug_exit(); @@ -818,7 +818,7 @@ void comphy_dedicated_phys_init(void) if (node > 0) { if (fdtdec_get_is_enabled(blob, node)) { ret = comphy_usb2_power_up(usb32); - if (ret == 0) + if (!ret) printf("Failed to initialize UTMI PHY\n"); else debug("UTMI PHY init succeed\n"); @@ -836,7 +836,7 @@ void comphy_dedicated_phys_init(void) if (node > 0) { if (fdtdec_get_is_enabled(blob, node)) { ret = comphy_sata_power_up(); - if (ret == 0) + if (!ret) printf("Failed to initialize SATA PHY\n"); else debug("SATA PHY init succeed\n"); @@ -857,7 +857,7 @@ void comphy_dedicated_phys_init(void) if (node > 0) { if (fdtdec_get_is_enabled(blob, node)) { ret = comphy_emmc_power_up(); - if (ret == 0) + if (!ret) printf("Failed to initialize SDIO/eMMC PHY\n"); else debug("SDIO/eMMC PHY init succeed\n"); @@ -915,7 +915,7 @@ int comphy_a3700_init(struct chip_serdes_phy_config *chip_cfg, ret = 1; break; } - if (ret == 0) + if (!ret) printf("PLL is not locked - Failed to initialize lane %d\n", lane); }