diff mbox series

[U-Boot,V5,13/31] imx: cpu: add cpu speed/grade for i.MX8M

Message ID 20180110052048.4425-14-peng.fan@nxp.com
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show
Series imx: add i.MX8M support and i.MX8MQ EVK | expand

Commit Message

Peng Fan Jan. 10, 2018, 5:20 a.m. UTC
Use more general enum types for speed grade.
Refine get_cpu_speed_grade_hz to support i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
---
 arch/arm/mach-imx/cpu.c | 27 +++++++++++++++------------
 1 file changed, 15 insertions(+), 12 deletions(-)

Comments

Stefano Babic Jan. 21, 2018, 4:31 p.m. UTC | #1
On 10/01/2018 06:20, Peng Fan wrote:
> Use more general enum types for speed grade.
> Refine get_cpu_speed_grade_hz to support i.MX8M.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> ---
>  arch/arm/mach-imx/cpu.c | 27 +++++++++++++++------------
>  1 file changed, 15 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
> index 52dbafb50c..fd6d08c533 100644
> --- a/arch/arm/mach-imx/cpu.c
> +++ b/arch/arm/mach-imx/cpu.c
> @@ -333,16 +333,18 @@ void set_chipselect_size(int const cs_size)
>  }
>  #endif
>  
> -#if defined(CONFIG_MX7)
> +#if defined(CONFIG_MX7) || defined(CONFIG_MX8M)
>  /*
>   * OCOTP_TESTER3[9:8] (see Fusemap Description Table offset 0x440)
>   * defines a 2-bit SPEED_GRADING
>   */
>  #define OCOTP_TESTER3_SPEED_SHIFT	8
> -#define OCOTP_TESTER3_SPEED_800MHZ	0
> -#define OCOTP_TESTER3_SPEED_500MHZ	1
> -#define OCOTP_TESTER3_SPEED_1GHZ	2
> -#define OCOTP_TESTER3_SPEED_1P2GHZ	3
> +enum cpu_speed {
> +	OCOTP_TESTER3_SPEED_GRADE0,
> +	OCOTP_TESTER3_SPEED_GRADE1,
> +	OCOTP_TESTER3_SPEED_GRADE2,
> +	OCOTP_TESTER3_SPEED_GRADE3,
> +};
>  
>  u32 get_cpu_speed_grade_hz(void)
>  {
> @@ -357,15 +359,16 @@ u32 get_cpu_speed_grade_hz(void)
>  	val &= 0x3;
>  
>  	switch(val) {
> -	case OCOTP_TESTER3_SPEED_800MHZ:
> +	case OCOTP_TESTER3_SPEED_GRADE0:
>  		return 800000000;
> -	case OCOTP_TESTER3_SPEED_500MHZ:
> -		return 500000000;
> -	case OCOTP_TESTER3_SPEED_1GHZ:
> -		return 1000000000;
> -	case OCOTP_TESTER3_SPEED_1P2GHZ:
> -		return 1200000000;
> +	case OCOTP_TESTER3_SPEED_GRADE1:
> +		return is_mx7() ? 500000000 : 1000000000;
> +	case OCOTP_TESTER3_SPEED_GRADE2:
> +		return is_mx7() ? 1000000000 : 1300000000;
> +	case OCOTP_TESTER3_SPEED_GRADE3:
> +		return is_mx7() ? 1200000000 : 1500000000;
>  	}
> +
>  	return 0;
>  }
>  
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 52dbafb50c..fd6d08c533 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -333,16 +333,18 @@  void set_chipselect_size(int const cs_size)
 }
 #endif
 
-#if defined(CONFIG_MX7)
+#if defined(CONFIG_MX7) || defined(CONFIG_MX8M)
 /*
  * OCOTP_TESTER3[9:8] (see Fusemap Description Table offset 0x440)
  * defines a 2-bit SPEED_GRADING
  */
 #define OCOTP_TESTER3_SPEED_SHIFT	8
-#define OCOTP_TESTER3_SPEED_800MHZ	0
-#define OCOTP_TESTER3_SPEED_500MHZ	1
-#define OCOTP_TESTER3_SPEED_1GHZ	2
-#define OCOTP_TESTER3_SPEED_1P2GHZ	3
+enum cpu_speed {
+	OCOTP_TESTER3_SPEED_GRADE0,
+	OCOTP_TESTER3_SPEED_GRADE1,
+	OCOTP_TESTER3_SPEED_GRADE2,
+	OCOTP_TESTER3_SPEED_GRADE3,
+};
 
 u32 get_cpu_speed_grade_hz(void)
 {
@@ -357,15 +359,16 @@  u32 get_cpu_speed_grade_hz(void)
 	val &= 0x3;
 
 	switch(val) {
-	case OCOTP_TESTER3_SPEED_800MHZ:
+	case OCOTP_TESTER3_SPEED_GRADE0:
 		return 800000000;
-	case OCOTP_TESTER3_SPEED_500MHZ:
-		return 500000000;
-	case OCOTP_TESTER3_SPEED_1GHZ:
-		return 1000000000;
-	case OCOTP_TESTER3_SPEED_1P2GHZ:
-		return 1200000000;
+	case OCOTP_TESTER3_SPEED_GRADE1:
+		return is_mx7() ? 500000000 : 1000000000;
+	case OCOTP_TESTER3_SPEED_GRADE2:
+		return is_mx7() ? 1000000000 : 1300000000;
+	case OCOTP_TESTER3_SPEED_GRADE3:
+		return is_mx7() ? 1200000000 : 1500000000;
 	}
+
 	return 0;
 }