diff mbox series

[U-Boot,V5,11/31] imx: add pad settings bit definition for i.MX8M

Message ID 20180110052048.4425-12-peng.fan@nxp.com
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show
Series imx: add i.MX8M support and i.MX8MQ EVK | expand

Commit Message

Peng Fan Jan. 10, 2018, 5:20 a.m. UTC
Add pad settings bit definition for i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/include/asm/mach-imx/iomux-v3.h | 22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

Comments

Stefano Babic Jan. 21, 2018, 4:30 p.m. UTC | #1
On 10/01/2018 06:20, Peng Fan wrote:
> Add pad settings bit definition for i.MX8M.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>  arch/arm/include/asm/mach-imx/iomux-v3.h | 22 +++++++++++++++++++++-
>  1 file changed, 21 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h b/arch/arm/include/asm/mach-imx/iomux-v3.h
> index ed75e9cd9a..800d4cfb50 100644
> --- a/arch/arm/include/asm/mach-imx/iomux-v3.h
> +++ b/arch/arm/include/asm/mach-imx/iomux-v3.h
> @@ -87,7 +87,27 @@ typedef u64 iomux_v3_cfg_t;
>  #define IOMUX_CONFIG_LPSR       0x20
>  #define MUX_MODE_LPSR           ((iomux_v3_cfg_t)IOMUX_CONFIG_LPSR << \
>  				MUX_MODE_SHIFT)
> -#ifdef CONFIG_MX7
> +#ifdef CONFIG_MX8M
> +#define PAD_CTL_DSE0		(0x0 << 0)
> +#define PAD_CTL_DSE1		(0x1 << 0)
> +#define PAD_CTL_DSE2		(0x2 << 0)
> +#define PAD_CTL_DSE3		(0x3 << 0)
> +#define PAD_CTL_DSE4		(0x4 << 0)
> +#define PAD_CTL_DSE5		(0x5 << 0)
> +#define PAD_CTL_DSE6		(0x6 << 0)
> +#define PAD_CTL_DSE7		(0x7 << 0)
> +
> +#define PAD_CTL_FSEL0		(0x0 << 3)
> +#define PAD_CTL_FSEL1		(0x1 << 3)
> +#define PAD_CTL_FSEL2		(0x2 << 3)
> +#define PAD_CTL_FSEL3		(0x3 << 3)
> +
> +#define PAD_CTL_ODE		(0x1 << 5)
> +#define PAD_CTL_PUE		(0x1 << 6)
> +#define PAD_CTL_HYS		(0x1 << 7)
> +#define PAD_CTL_LVTTL		(0x1 << 8)
> +
> +#elif defined CONFIG_MX7
>  
>  #define IOMUX_LPSR_SEL_INPUT_OFS 0x70000
>  
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic
diff mbox series

Patch

diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h b/arch/arm/include/asm/mach-imx/iomux-v3.h
index ed75e9cd9a..800d4cfb50 100644
--- a/arch/arm/include/asm/mach-imx/iomux-v3.h
+++ b/arch/arm/include/asm/mach-imx/iomux-v3.h
@@ -87,7 +87,27 @@  typedef u64 iomux_v3_cfg_t;
 #define IOMUX_CONFIG_LPSR       0x20
 #define MUX_MODE_LPSR           ((iomux_v3_cfg_t)IOMUX_CONFIG_LPSR << \
 				MUX_MODE_SHIFT)
-#ifdef CONFIG_MX7
+#ifdef CONFIG_MX8M
+#define PAD_CTL_DSE0		(0x0 << 0)
+#define PAD_CTL_DSE1		(0x1 << 0)
+#define PAD_CTL_DSE2		(0x2 << 0)
+#define PAD_CTL_DSE3		(0x3 << 0)
+#define PAD_CTL_DSE4		(0x4 << 0)
+#define PAD_CTL_DSE5		(0x5 << 0)
+#define PAD_CTL_DSE6		(0x6 << 0)
+#define PAD_CTL_DSE7		(0x7 << 0)
+
+#define PAD_CTL_FSEL0		(0x0 << 3)
+#define PAD_CTL_FSEL1		(0x1 << 3)
+#define PAD_CTL_FSEL2		(0x2 << 3)
+#define PAD_CTL_FSEL3		(0x3 << 3)
+
+#define PAD_CTL_ODE		(0x1 << 5)
+#define PAD_CTL_PUE		(0x1 << 6)
+#define PAD_CTL_HYS		(0x1 << 7)
+#define PAD_CTL_LVTTL		(0x1 << 8)
+
+#elif defined CONFIG_MX7
 
 #define IOMUX_LPSR_SEL_INPUT_OFS 0x70000