From patchwork Sat Dec 9 18:55:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 846582 X-Patchwork-Delegate: joe.hershberger@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="X+rWXEdB"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3yvJNT1vqrz9sR8 for ; Sun, 10 Dec 2017 05:56:40 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 91F72C21E0A; Sat, 9 Dec 2017 18:56:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id CBC6AC21DB0; Sat, 9 Dec 2017 18:55:50 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id EFB95C21E24; Sat, 9 Dec 2017 18:55:47 +0000 (UTC) Received: from mail-ot0-f194.google.com (mail-ot0-f194.google.com [74.125.82.194]) by lists.denx.de (Postfix) with ESMTPS id 339DEC21E4A for ; Sat, 9 Dec 2017 18:55:44 +0000 (UTC) Received: by mail-ot0-f194.google.com with SMTP id q3so11712043oth.2 for ; Sat, 09 Dec 2017 10:55:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fzwaZjBNG6tuv3ItcBzhjM1qCbsOk6iDFknECOZHCc4=; b=X+rWXEdB2gTVb5ylO9gYO3YW8CfsGOnfaIEgHP1QlCiN7U8mE5SdjnsxGMDBWlNVqm nc2ygli3JgnvJyzRVgX1OyTLh/Z/Ztv5iwKlcmdzNcn/5w7BH21zf6b1jveP5inWAr2v fAxSBvu3PL0ppgvqzhdur7uHH1tNTKWxcBqYWEFVlmNwVp5xDRX/YghF7JlfekPUPD/p /rQz0h403xg9LghZdtoztuuOXmhDeQELlyFfpjafKG0RB0Qh2piCezoe4SfeeMR+2vVW ZDttCOqDH7AxEcm6Si/CrbhyuMlpE+4hyRMaQrGuuYV1yd1JBntp8X+VI1OEw5b5cHcR SU2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fzwaZjBNG6tuv3ItcBzhjM1qCbsOk6iDFknECOZHCc4=; b=kxuZ+yEZKxCxeg74DShf2a23WBSafUi5ypmgIdsXKNLrSxyoJyy3vmBDT6Zi5Pf/tk 4u5Pu8p6HWkT7h2HXRCI2DBg7uf+aGHCy7wlKMtZYscTKW6OpTiDzqCpWGsgk2DqXbCO gNnTdQrbJ47VemkTQUwDZRouq5HG5d2CEXMAVyxhpHAWU1ewvAlNODXRYvyBaBfmLJ0N i+UCrG7BsA9cz/BF1t4AwxZLKrUbaJnOZavLtkFF0fMFZzU49iKWuAKE7sr3rN98OKiT BdTBvNnt+hdAW6JIDRYykY02OcJ5RV8aX78sAwwd1lsHNg7IgXNtAA0MdmREAR75yuiD fKgQ== X-Gm-Message-State: AJaThX5magxM8NHjhgXYr23t3YWvIKod3terfLjccMoM1aPxmy7cTHZV SfsA1kitM5K29dDcT+AinSE1YwGI X-Google-Smtp-Source: AGs4zMaLS10NIajrULUFpA5Tm/toppk6ms8ih2VCutBUpOqiWl+dNlbtXsGdjY+NQgtjMhrC5PnUvg== X-Received: by 10.157.43.167 with SMTP id u36mr31692284ota.287.1512845742621; Sat, 09 Dec 2017 10:55:42 -0800 (PST) Received: from cox.net ([2001:470:d:73f:4d7d:8488:119c:738d]) by smtp.gmail.com with ESMTPSA id f100sm4826577otf.3.2017.12.09.10.55.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 09 Dec 2017 10:55:41 -0800 (PST) From: Florian Fainelli To: u-boot@lists.denx.de Date: Sat, 9 Dec 2017 10:55:29 -0800 Message-Id: <20171209185530.27342-4-f.fainelli@gmail.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171209185530.27342-1-f.fainelli@gmail.com> References: <20171209185530.27342-1-f.fainelli@gmail.com> Cc: Alexandru Gagniuc , Joe Hershberger , Stefan Roese , Jelle de Jong Subject: [U-Boot] [PATCH v3 3/4] net: phy: b53: Add b53_reg read/write commands X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add a b53_reg read/write command which allows inspecting the switch registers. Because the Broadcom BCM53xx registers have different sizes, we need to split the accesses in 8, 16, 32, 48 or 64 bits to obtain expected results. Reviewed-by: Stefan Roese Acked-by: Joe Hershberger Signed-off-by: Florian Fainelli --- drivers/net/phy/b53.c | 138 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 138 insertions(+) diff --git a/drivers/net/phy/b53.c b/drivers/net/phy/b53.c index 167ae0077eea..6fc8d5df1801 100644 --- a/drivers/net/phy/b53.c +++ b/drivers/net/phy/b53.c @@ -625,3 +625,141 @@ int phy_b53_init(void) return 0; } + +int do_b53_reg_read(const char *name, int argc, char * const argv[]) +{ + u8 page, offset, width; + struct mii_dev *bus; + int ret = -EINVAL; + u64 value64 = 0; + u32 value32 = 0; + u16 value16 = 0; + u8 value8 = 0; + + bus = miiphy_get_dev_by_name(name); + if (!bus) { + printf("unable to find MDIO bus: %s\n", name); + return ret; + } + + page = simple_strtoul(argv[1], NULL, 16); + offset = simple_strtoul(argv[2], NULL, 16); + width = simple_strtoul(argv[3], NULL, 10); + + switch (width) { + case 8: + ret = b53_mdio_read8(bus, page, offset, &value8); + printf("page=0x%02x, offset=0x%02x, value=0x%02x\n", + page, offset, value8); + break; + case 16: + ret = b53_mdio_read16(bus, page, offset, &value16); + printf("page=0x%02x, offset=0x%02x, value=0x%04x\n", + page, offset, value16); + break; + case 32: + ret = b53_mdio_read32(bus, page, offset, &value32); + printf("page=0x%02x, offset=0x%02x, value=0x%08x\n", + page, offset, value32); + break; + case 48: + ret = b53_mdio_read48(bus, page, offset, &value64); + printf("page=0x%02x, offset=0x%02x, value=0x%012llx\n", + page, offset, value64); + break; + case 64: + ret = b53_mdio_read48(bus, page, offset, &value64); + printf("page=0x%02x, offset=0x%02x, value=0x%016llx\n", + page, offset, value64); + break; + default: + printf("Unsupported width: %d\n", width); + break; + } + + return ret; +} + +int do_b53_reg_write(const char *name, int argc, char * const argv[]) +{ + u8 page, offset, width; + struct mii_dev *bus; + int ret = -EINVAL; + u64 value64 = 0; + u32 value = 0; + + bus = miiphy_get_dev_by_name(name); + if (!bus) { + printf("unable to find MDIO bus: %s\n", name); + return ret; + } + + page = simple_strtoul(argv[1], NULL, 16); + offset = simple_strtoul(argv[2], NULL, 16); + width = simple_strtoul(argv[3], NULL, 10); + if (width == 48 || width == 64) + value64 = simple_strtoull(argv[4], NULL, 16); + else + value = simple_strtoul(argv[4], NULL, 16); + + switch (width) { + case 8: + ret = b53_mdio_write8(bus, page, offset, value & 0xff); + break; + case 16: + ret = b53_mdio_write16(bus, page, offset, value); + break; + case 32: + ret = b53_mdio_write32(bus, page, offset, value); + break; + case 48: + ret = b53_mdio_write48(bus, page, offset, value64); + break; + case 64: + ret = b53_mdio_write64(bus, page, offset, value64); + break; + default: + printf("Unsupported width: %d\n", width); + break; + } + + return ret; +} + +int do_b53_reg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + const char *cmd, *mdioname; + int ret = 0; + + if (argc < 2) + return cmd_usage(cmdtp); + + cmd = argv[1]; + --argc; + ++argv; + + if (!strcmp(cmd, "write")) { + if (argc < 4) + return cmd_usage(cmdtp); + mdioname = argv[1]; + --argc; + ++argv; + ret = do_b53_reg_write(mdioname, argc, argv); + } else if (!strcmp(cmd, "read")) { + if (argc < 5) + return cmd_usage(cmdtp); + mdioname = argv[1]; + --argc; + ++argv; + ret = do_b53_reg_read(mdioname, argc, argv); + } else + return cmd_usage(cmdtp); + + return ret; +} + +U_BOOT_CMD(b53_reg, 7, 1, do_b53_reg, + "Broadcom B53 switch register access", + "write mdioname page (hex) offset (hex) width (dec) value (hex)\n" + "read mdioname page (hex) offset (hex) width (dec)\n" + );