diff mbox series

[U-Boot,V2,18/23] net: fec: do not access reserved register for i.MX8M

Message ID 20171204043136.17167-19-peng.fan@nxp.com
State Changes Requested
Delegated to: Stefano Babic
Headers show
Series imx: add i.MX8M support and i.MX8MQ EVK | expand

Commit Message

Peng Fan Dec. 4, 2017, 4:31 a.m. UTC 
The MIB RAM and FIFO receive start register does not exist on
i.MX8M. Accessing these register will cause system hang.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
---
 drivers/net/fec_mxc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Joe Hershberger Dec. 5, 2017, 8:36 p.m. UTC | #1 
On Sun, Dec 3, 2017 at 10:31 PM, Peng Fan <peng.fan@nxp.com> wrote:
> The MIB RAM and FIFO receive start register does not exist on
> i.MX8M. Accessing these register will cause system hang.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Cc: Joe Hershberger <joe.hershberger@ni.com>

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Stefano Babic Dec. 7, 2017, 8:42 a.m. UTC | #2 
On 04/12/2017 05:31, Peng Fan wrote:
> The MIB RAM and FIFO receive start register does not exist on
> i.MX8M. Accessing these register will cause system hang.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Cc: Joe Hershberger <joe.hershberger@ni.com>
> ---
>  drivers/net/fec_mxc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
> index 433e19f0f8..4cbc8cbbfd 100644
> --- a/drivers/net/fec_mxc.c
> +++ b/drivers/net/fec_mxc.c
> @@ -562,8 +562,8 @@ static int fec_init(struct eth_device *dev, bd_t *bd)
>  	writel(0x00000000, &fec->eth->gaddr1);
>  	writel(0x00000000, &fec->eth->gaddr2);
>  
> -	/* Do not access reserved register for i.MX6UL */
> -	if (!is_mx6ul() && !is_mx6ull()) {
> +	/* Do not access reserved register */
> +	if (!is_mx6ul() && !is_mx6ull() && !is_mx8m()) {
>  		/* clear MIB RAM */
>  		for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4)
>  			writel(0, i);
> 
Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic
Fabio Estevam Dec. 16, 2017, 5:41 p.m. UTC | #3 
On Mon, Dec 4, 2017 at 2:31 AM, Peng Fan <peng.fan@nxp.com> wrote:
> The MIB RAM and FIFO receive start register does not exist on
> i.MX8M. Accessing these register will cause system hang.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Cc: Joe Hershberger <joe.hershberger@ni.com>

Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
diff mbox series

Patch

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 433e19f0f8..4cbc8cbbfd 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -562,8 +562,8 @@  static int fec_init(struct eth_device *dev, bd_t *bd)
 	writel(0x00000000, &fec->eth->gaddr1);
 	writel(0x00000000, &fec->eth->gaddr2);
 
-	/* Do not access reserved register for i.MX6UL */
-	if (!is_mx6ul() && !is_mx6ull()) {
+	/* Do not access reserved register */
+	if (!is_mx6ul() && !is_mx6ull() && !is_mx8m()) {
 		/* clear MIB RAM */
 		for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4)
 			writel(0, i);