From patchwork Fri Sep 22 07:26:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 817350 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3xz4tQ3clcz9sNc for ; Fri, 22 Sep 2017 17:31:58 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 47D5DC21E4A; Fri, 22 Sep 2017 07:28:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C5B85C21F7B; Fri, 22 Sep 2017 07:26:59 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 75F13C21E13; Fri, 22 Sep 2017 07:26:51 +0000 (UTC) Received: from wens.csie.org (mirror2.csie.ntu.edu.tw [140.112.30.76]) by lists.denx.de (Postfix) with ESMTPS id E1C9AC21C26 for ; Fri, 22 Sep 2017 07:26:46 +0000 (UTC) Received: by wens.csie.org (Postfix, from userid 1000) id C731260097; Fri, 22 Sep 2017 15:26:36 +0800 (CST) From: Chen-Yu Tsai To: u-boot@lists.denx.de Date: Fri, 22 Sep 2017 15:26:32 +0800 Message-Id: <20170922072635.32105-7-wens@csie.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170922072635.32105-1-wens@csie.org> References: <20170922072635.32105-1-wens@csie.org> Cc: Joe Hershberger , Jagan Teki , Maxime Ripard Subject: [U-Boot] [PATCH 6/9] net: sun8i_emac: Support RX/TX delay chains X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The EMAC syscon has configurable RX/TX delay chains for use with RGMII PHYs. This adds support for configuring them via device tree properties. The property names and format were defined in Linux's dwmac-sun8i binding that was merged at one point. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard --- drivers/net/sun8i_emac.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 09bbb2cdb5ca..5fa1b4c170d7 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -56,6 +56,10 @@ #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */ #define SC_RMII_EN BIT(13) +#define SC_TXDC_SHIFT 10 +#define SC_TXDC_MASK GENMASK(2, 0) +#define SC_RXDC_SHIFT 5 +#define SC_RXDC_MASK GENMASK(4, 0) #define SC_EPIT BIT(2) /* 1: RGMII, 0: MII */ #define SC_ETCS_MASK GENMASK(1, 0) #define SC_ETCS_EXT_GMII 0x1 @@ -125,6 +129,8 @@ struct emac_eth_dev { u32 addr; u32 tx_slot; bool use_internal_phy; + u32 tx_delay; + u32 rx_delay; enum emac_variant variant; void *mac_reg; @@ -290,6 +296,12 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv) if (priv->variant == H3_EMAC || priv->variant == A64_EMAC) reg &= ~SC_RMII_EN; + /* Configure RX/TX delay chains */ + reg &= ~(SC_RXDC_MASK << SC_RXDC_SHIFT); + reg &= ~(SC_TXDC_MASK << SC_TXDC_SHIFT); + reg |= (priv->rx_delay & SC_RXDC_MASK) << SC_RXDC_SHIFT; + reg |= (priv->tx_delay & SC_TXDC_MASK) << SC_TXDC_SHIFT; + switch (priv->interface) { case PHY_INTERFACE_MODE_MII: /* default */ @@ -836,6 +848,19 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev) } #endif + /* Get RX/TX delays for RGMII */ + priv->rx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), + "allwinner,rx-delay-ps", 0); + if (priv->rx_delay % 100 || priv->rx_delay > 3100) + debug("%s: invalid rx delay value\n", __func__); + priv->rx_delay /= 100; + + priv->tx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), + "allwinner,tx-delay-ps", 0); + if (priv->tx_delay % 100 || priv->tx_delay > 800) + debug("%s: invalid tx delay value\n", __func__); + priv->tx_delay /= 100; + return 0; }