diff --git a/README b/README
index 2371304279..d5684ce5b5 100644
--- a/README
+++ b/README
@@ -2500,12 +2500,6 @@ The following options need to be configured:
 		CONFIG_SF_DEFAULT_MODE 		(see include/spi.h)
 		CONFIG_SF_DEFAULT_SPEED		in Hz
 
-		CONFIG_CMD_SF_TEST
-
-		Define this option to include a destructive SPI flash
-		test ('sf test').
-
-- SystemACE Support:
 		CONFIG_SYSTEMACE
 
 		Adding this option adds support for Xilinx SystemACE
diff --git a/arch/Kconfig b/arch/Kconfig
index e063ee0d23..08f6e7f47d 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -78,6 +78,7 @@ config SANDBOX
 	imply LZMA
 	imply SCSI
 	imply CMD_SATA
+	imply CMD_SF_TEST
 
 config SH
 	bool "SuperH architecture"
@@ -111,6 +112,7 @@ config X86
 	imply CMD_GETTIME
 	imply CMD_IO
 	imply CMD_IRQ
+	imply CMD_SF_TEST
 
 config XTENSA
 	bool "Xtensa architecture"
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6431d7c70f..2a9c55f608 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -788,6 +788,17 @@ config CMD_SF
 	help
 	  SPI Flash support
 
+config CMD_SF_TEST
+	bool "sf test - Allow testing of SPI flash"
+	help
+	  Provides a way to test that SPI flash is working correctly. The
+	  test is destructive, in that an area of SPI flash must be provided
+	  for the test to use. Performance information is also provided,
+	  measuring the performance of reading, writing and erasing in
+	  Mbps (Million Bits Per Second). This value should approximately
+	  equal the SPI bus speed for a single-bit-wide SPI bus, assuming
+	  everything is working properly.
+
 config CMD_SPI
 	bool "sspi"
 	help
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index 01032e7330..b4e727009c 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_SF_TEST=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index b9d4fc9c12..8e91db4014 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_SF_TEST=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index fb955e46c6..e512ce1ef8 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_SF_TEST=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
diff --git a/configs/efi-x86_defconfig b/configs/efi-x86_defconfig
index 789c5ce5bf..a23d402dee 100644
--- a/configs/efi-x86_defconfig
+++ b/configs/efi-x86_defconfig
@@ -11,6 +11,7 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_PART=y
 CONFIG_CMD_SF=y
+# CONFIG_CMD_SF_TEST is not set
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_GPIO=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index a1844d30a2..349d3c7270 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -41,6 +41,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_REMOTEPROC=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_PCI=y
+CONFIG_CMD_READ=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TFTPSRV=y
 CONFIG_CMD_RARP=y
@@ -193,6 +194,3 @@ CONFIG_UNIT_TEST=y
 CONFIG_UT_TIME=y
 CONFIG_UT_DM=y
 CONFIG_UT_ENV=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_CMD_MTDPARTS_SPREAD=y
-CONFIG_CMD_READ=y
diff --git a/include/configs/efi-x86.h b/include/configs/efi-x86.h
index 4a6b66507f..fa263632a2 100644
--- a/include/configs/efi-x86.h
+++ b/include/configs/efi-x86.h
@@ -9,8 +9,6 @@
 
 #include <configs/x86-common.h>
 
-#undef CONFIG_CMD_SF_TEST
-
 #undef CONFIG_TPM_TIS_BASE_ADDRESS
 
 #undef CONFIG_SCSI_AHCI
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index beb5a124a2..13777abb4c 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -52,7 +52,6 @@
 #define CONFIG_ENV_SIZE		8192
 
 /* SPI - enable all SPI flash types for testing purposes */
-#define CONFIG_CMD_SF_TEST
 
 #define CONFIG_I2C_EDID
 
diff --git a/include/configs/veyron.h b/include/configs/veyron.h
index 3f236aa13c..3a5fc065d8 100644
--- a/include/configs/veyron.h
+++ b/include/configs/veyron.h
@@ -17,8 +17,6 @@
 #define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SPI_FLASH_GIGADEVICE
 
-#define CONFIG_CMD_SF_TEST
-
 #define CONFIG_KEYBOARD
 
 #endif
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index f5f7a92b8b..43af193344 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -107,7 +107,6 @@
 /*-----------------------------------------------------------------------
  * FLASH configuration
  */
-#define CONFIG_CMD_SF_TEST
 #define CONFIG_SPI
 
 /*-----------------------------------------------------------------------
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 1d7244c5ee..3a81c7e3ad 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -296,7 +296,6 @@ CONFIG_CM922T_XA10
 CONFIG_CMDLINE_EDITING
 CONFIG_CMDLINE_PS_SUPPORT
 CONFIG_CMDLINE_TAG
-CONFIG_CMD_SF_TEST
 CONFIG_CMD_SH_ZIMAGEBOOT
 CONFIG_CMD_SPL
 CONFIG_CMD_SPL_NAND_OFS
