diff --git a/arch/arm/mach-at91/atmel_sfr.c b/arch/arm/mach-at91/atmel_sfr.c
index adf44c6a94..d595ba8836 100644
--- a/arch/arm/mach-at91/atmel_sfr.c
+++ b/arch/arm/mach-at91/atmel_sfr.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <asm/hardware.h>
 #include <asm/io.h>
 #include <asm/arch/sama5_sfr.h>
 
diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c
index 57d72700d3..08659c87d4 100644
--- a/arch/arm/mach-at91/matrix.c
+++ b/arch/arm/mach-at91/matrix.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <asm/hardware.h>
 #include <asm/io.h>
 #include <asm/arch/sama5_matrix.h>
 
diff --git a/arch/arm/mach-at91/phy.c b/arch/arm/mach-at91/phy.c
index ddd70f5ff0..adb761e1ac 100644
--- a/arch/arm/mach-at91/phy.c
+++ b/arch/arm/mach-at91/phy.c
@@ -13,6 +13,7 @@
  */
 
 #include <common.h>
+#include <asm/hardware.h>
 #include <asm/io.h>
 #include <linux/sizes.h>
 #include <asm/arch/at91_rstc.h>
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 38c435e37a..81f30eabe9 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dm/pinctrl.h>
+#include <asm/hardware.h>
 #include <linux/io.h>
 #include <linux/err.h>
 #include <mach/at91_pio.h>
diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h
index b4135235d4..6da9d8eb3e 100644
--- a/include/configs/at91-sama5_common.h
+++ b/include/configs/at91-sama5_common.h
@@ -10,8 +10,6 @@
 #ifndef __AT91_SAMA5_COMMON_H
 #define __AT91_SAMA5_COMMON_H
 
-#include <asm/hardware.h>
-
 #define CONFIG_SYS_TEXT_BASE		0x26f00000
 
 /* ARM asynchronous clock */
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index 8b00370cdd..dbdc70a960 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -11,8 +11,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/hardware.h>
-
 #define CONFIG_SYS_TEXT_BASE		0x73f00000
 
 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
@@ -58,7 +56,7 @@
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS6
+#define CONFIG_SYS_SDRAM_BASE           0x70000000
 #define CONFIG_SYS_SDRAM_SIZE		0x08000000
 
 #define CONFIG_SYS_INIT_SP_ADDR \
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index e4ff019967..ba68138f21 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -10,12 +10,6 @@
 #ifndef __AT91SAM9N12_CONFIG_H_
 #define __AT91SAM9N12_CONFIG_H_
 
-/*
- * SoC must be defined first, before hardware.h is included.
- * In this case SoC is defined in boards.cfg.
- */
-#include <asm/hardware.h>
-
 #define CONFIG_SYS_TEXT_BASE		0x26f00000
 
 /* ARM asynchronous clock */
@@ -60,7 +54,7 @@
  * that address while providing maximum stack area below.
  */
 # define CONFIG_SYS_INIT_SP_ADDR \
-	(ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
+	(0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
 
 /* DataFlash */
 #ifdef CONFIG_CMD_SF
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 7887791c37..5f53bcc4d0 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -9,8 +9,6 @@
 #ifndef __CONFIG_H__
 #define __CONFIG_H__
 
-#include <asm/hardware.h>
-
 #define CONFIG_SYS_TEXT_BASE		0x26f00000
 
 /* ARM asynchronous clock */
diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index 7c28a94d92..542f96a0dc 100644
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -15,11 +15,14 @@
 #define CONFIG_SYS_USE_SERIALFLASH	1
 #define CONFIG_BOARD_LATE_INIT
 
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER	0xfc06863c
+
 /*
  * Memory configurations
  */
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE		0x20000000
 #define CONFIG_SYS_SDRAM_SIZE		0x10000000
 
 #ifdef CONFIG_SPL_BUILD
@@ -46,8 +49,8 @@
  * Serial Driver
  */
 #define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE		ATMEL_BASE_USART0
-#define CONFIG_USART_ID			ATMEL_ID_USART0
+#define CONFIG_USART_BASE		0xf802c000
+#define CONFIG_USART_ID			6
 
 /*
  * Ethernet
diff --git a/include/configs/sama5d2_ptc.h b/include/configs/sama5d2_ptc.h
index bff9f8eb48..4bd7c04e24 100644
--- a/include/configs/sama5d2_ptc.h
+++ b/include/configs/sama5d2_ptc.h
@@ -14,10 +14,10 @@
 
 /* serial console */
 #define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE		ATMEL_BASE_UART0
-#define CONFIG_USART_ID			ATMEL_ID_UART0
+#define CONFIG_USART_BASE		0xf801c000
+#define CONFIG_USART_ID			24
 
-#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE		0x20000000
 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
 
 #ifdef CONFIG_SPL_BUILD
@@ -53,7 +53,7 @@
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE		0x80000000
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
 /* our CLE is AD22 */
diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h
index fdfc1d1bc0..b4d996d455 100644
--- a/include/configs/sama5d2_xplained.h
+++ b/include/configs/sama5d2_xplained.h
@@ -16,7 +16,7 @@
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE           0x20000000
 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
 
 #ifdef CONFIG_SPL_BUILD
diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h
index 76533e3954..017c3862ad 100644
--- a/include/configs/sama5d3_xplained.h
+++ b/include/configs/sama5d3_xplained.h
@@ -16,16 +16,16 @@
  * This needs to be defined for the OHCI code to work but it is defined as
  * ATMEL_ID_UHPHS in the CPU specific header files.
  */
-#define ATMEL_ID_UHP			ATMEL_ID_UHPHS
+#define ATMEL_ID_UHP			32
 
 /*
  * Specify the clock enable bit in the PMC_SCER register.
  */
-#define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP
+#define ATMEL_PMC_UHP			(1 <<  6)
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE           0x20000000
 #define CONFIG_SYS_SDRAM_SIZE		0x10000000
 
 #ifdef CONFIG_SPL_BUILD
@@ -41,7 +41,7 @@
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE		0x60000000
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
 /* our CLE is AD22 */
@@ -65,7 +65,7 @@
 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_CPU_INIT
-#define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
+#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00600000
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"SAMA5D3 Xplained"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
 #endif
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index 49cb237236..77b1e7ec2f 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -21,12 +21,12 @@
  * This needs to be defined for the OHCI code to work but it is defined as
  * ATMEL_ID_UHPHS in the CPU specific header files.
  */
-#define ATMEL_ID_UHP			ATMEL_ID_UHPHS
+#define ATMEL_ID_UHP			32
 
 /*
  * Specify the clock enable bit in the PMC_SCER register.
  */
-#define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP
+#define ATMEL_PMC_UHP			(1 <<  6)
 
 /* NOR flash */
 #ifdef CONFIG_MTD_NOR_FLASH
@@ -40,7 +40,7 @@
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE           0x20000000
 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
 
 #ifdef CONFIG_SPL_BUILD
@@ -62,7 +62,7 @@
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE		0x60000000
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
 /* our CLE is AD22 */
diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h
index ddb48c335a..36b2c01969 100644
--- a/include/configs/sama5d4_xplained.h
+++ b/include/configs/sama5d4_xplained.h
@@ -16,7 +16,7 @@
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE           0x20000000
 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
 
 #ifdef CONFIG_SPL_BUILD
@@ -38,7 +38,7 @@
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE		0x80000000
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
 /* our CLE is AD22 */
diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h
index ab0147738c..d9bca3db63 100644
--- a/include/configs/sama5d4ek.h
+++ b/include/configs/sama5d4ek.h
@@ -14,7 +14,7 @@
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE           0x20000000
 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
 
 #ifdef CONFIG_SPL_BUILD
@@ -36,7 +36,7 @@
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_BASE		0x80000000
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
 /* our CLE is AD22 */
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index adff1b6d7f..ad0a9fefba 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -23,12 +23,15 @@
 
 /* serial console */
 #define CONFIG_ATMEL_USART
-#define CONFIG_USART_BASE		ATMEL_BASE_USART3
-#define	CONFIG_USART_ID			ATMEL_ID_USART3
+#define CONFIG_USART_BASE		0xfc00c000
+#define CONFIG_USART_ID			30
+
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER	0xfc06863c
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
+#define CONFIG_SYS_SDRAM_BASE           0x20000000
 #define CONFIG_SYS_SDRAM_SIZE		0x4000000
 
 #define CONFIG_SYS_INIT_SP_ADDR \
@@ -55,7 +58,7 @@
 #ifdef CONFIG_CMD_MMC
 #define CONFIG_SUPPORT_EMMC_BOOT
 #define CONFIG_GENERIC_ATMEL_MCI
-#define ATMEL_BASE_MMCI			ATMEL_BASE_MCI1
+#define ATMEL_BASE_MMCI			0xfc000000
 #define CONFIG_SYS_MMC_CLK_OD		500000
 
 /* For generating MMC partitions */
