From patchwork Tue Jul 25 07:00:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenyou Yang X-Patchwork-Id: 793247 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3xGqCz1gjWz9s0g for ; Tue, 25 Jul 2017 17:11:27 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 058EAC21DE8; Tue, 25 Jul 2017 07:08:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E7E81C21E1B; Tue, 25 Jul 2017 07:07:25 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A3F52C21E11; Tue, 25 Jul 2017 07:07:24 +0000 (UTC) Received: from eusmtp01.atmel.com (eusmtp01.atmel.com [212.144.249.242]) by lists.denx.de (Postfix) with ESMTPS id A3F2DC21E05 for ; Tue, 25 Jul 2017 07:07:11 +0000 (UTC) Received: from apsmtp01.atmel.com (10.168.254.31) by eusmtp01.atmel.com (10.145.145.30) with Microsoft SMTP Server id 14.3.235.1; Tue, 25 Jul 2017 09:07:09 +0200 Received: from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.atmel.com (10.168.254.31) with Microsoft SMTP Server id 14.3.235.1; Tue, 25 Jul 2017 15:09:01 +0800 From: Wenyou Yang To: U-Boot Mailing List Date: Tue, 25 Jul 2017 15:00:59 +0800 Message-ID: <20170725070102.1344-6-wenyou.yang@microchip.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170725070102.1344-1-wenyou.yang@microchip.com> References: <20170725070102.1344-1-wenyou.yang@microchip.com> MIME-Version: 1.0 Cc: Marek Vasut , Cyrille Pitchen , Jagan Teki Subject: [U-Boot] [PATCH v3 5/8] sf: add 'addr_len' member to 'struct spi_flash' X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Cyrille Pitchen This is a transitional patch to prepare the SPI FLASH sub-system to support the 4-byte address instruction set later. For now, flash->addr_len is always set to SPI_FLASH_3B_ADDR_LEN. Signed-off-by: Cyrille Pitchen Signed-off-by: Wenyou Yang --- Changes in v3: None Changes in v2: None drivers/mtd/spi/spi_flash.c | 13 ++++++++----- include/spi_flash.h | 2 ++ 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 8712e5eef0..d6942d57b2 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -322,7 +322,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len) } } - spi_flash_command_init(&cmd, flash->erase_cmd, SPI_FLASH_3B_ADDR_LEN, + spi_flash_command_init(&cmd, flash->erase_cmd, flash->addr_len, SPI_FCMD_ERASE); while (len) { erase_addr = offset; @@ -377,7 +377,7 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, } } - spi_flash_command_init(&cmd, flash->write_cmd, SPI_FLASH_3B_ADDR_LEN, + spi_flash_command_init(&cmd, flash->write_cmd, flash->addr_len, SPI_FCMD_WRITE); cmd.proto = flash->write_proto; for (actual = 0; actual < len; actual += chunk_len) { @@ -481,7 +481,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, return 0; } - spi_flash_command_init(&cmd, flash->read_cmd, SPI_FLASH_3B_ADDR_LEN, + spi_flash_command_init(&cmd, flash->read_cmd, flash->addr_len, SPI_FCMD_READ); cmd.proto = flash->read_proto; cmd.num_wait_states = flash->dummy_byte * 8; @@ -529,7 +529,7 @@ static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf) int ret; u8 sr = 0xFFu; - spi_flash_command_init(&cmd, CMD_SST_BP, SPI_FLASH_3B_ADDR_LEN, + spi_flash_command_init(&cmd, CMD_SST_BP, flash->addr_len, SPI_FCMD_WRITE); cmd.addr = offset; cmd.data_len = 1; @@ -580,7 +580,7 @@ int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, if (ret) goto done; - spi_flash_command_init(&cmd, CMD_SST_AAI_WP, SPI_FLASH_3B_ADDR_LEN, + spi_flash_command_init(&cmd, CMD_SST_AAI_WP, flash->addr_len, SPI_FCMD_WRITE); cmd.addr = offset; cmd.data_len = 2; @@ -1102,6 +1102,9 @@ int spi_flash_scan(struct spi_flash *flash) flash->flags |= SNOR_F_USE_FSR; #endif + /* Set the address length */ + flash->addr_len = SPI_FLASH_3B_ADDR_LEN; + /* Configure the BAR - discover bank cmds and read current bank */ #ifdef CONFIG_SPI_FLASH_BAR ret = read_bar(flash, info); diff --git a/include/spi_flash.h b/include/spi_flash.h index 688a1708fd..09a81fdd76 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -45,6 +45,7 @@ struct spi_slave; * @bank_read_cmd: Bank read cmd * @bank_write_cmd: Bank write cmd * @bank_curr: Current flash bank + * @addr_len: Number of bytes for the address * @erase_cmd: Erase cmd 4K, 32K, 64K * @read_cmd: Read cmd - Array Fast, Extn read and quad read. * @write_cmd: Write cmd - page and quad program. @@ -82,6 +83,7 @@ struct spi_flash { u8 bank_write_cmd; u8 bank_curr; #endif + u8 addr_len; u8 erase_cmd; u8 read_cmd; u8 write_cmd;