From patchwork Mon Jun 19 17:11:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 777879 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3wryFL47swz9s7m for ; Tue, 20 Jun 2017 03:11:50 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="mV0L5Y40"; dkim-atps=neutral Received: by lists.denx.de (Postfix, from userid 105) id 4BA4FC21C83; Mon, 19 Jun 2017 17:11:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 26F92C21C2A; Mon, 19 Jun 2017 17:11:44 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id D8F22C21BE6; Mon, 19 Jun 2017 17:11:42 +0000 (UTC) Received: from mail-oi0-f50.google.com (mail-oi0-f50.google.com [209.85.218.50]) by lists.denx.de (Postfix) with ESMTPS id 22A59C21C2A for ; Mon, 19 Jun 2017 17:11:42 +0000 (UTC) Received: by mail-oi0-f50.google.com with SMTP id c189so35296532oia.2 for ; Mon, 19 Jun 2017 10:11:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=V2SEjCqRhXzybY9v5KqOwvpxpCvMCS+5IeuEgDwL0Lg=; b=mV0L5Y40FPcQjqvmHbd0xLiLflGHApDuIMQSUuLKeMBsZQaQq1i/pir3Oerj9qpB1T natHUezbqiSKRWtrS4D3MGhE++GrVjrhzsQAAoq5E6Y6ESFYvHH7bHAVLfEK5Sw0bi2w yRA/K3AqPfqxgKDuSZ298SEyF4ZvL1qkHL4CqJ050yzhpOSzrB0XDtqND42GApWhzBI+ 0wRTbGvJMf/KFXjkYOknmFZH+JEmhMtWi0AlENQfc+ToqIdhBNAlQdwTSfR8Oq9yBwmY 2EIS9DBfPI9euyAfzwQVbXOV4bR5bkJrksP0xYZivITeRsOUJOv9fzyfuIMEoO2BA00A 8M4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=V2SEjCqRhXzybY9v5KqOwvpxpCvMCS+5IeuEgDwL0Lg=; b=I0VbXzzDR+VFxaYrJ6LLWJiI7/Fjq0OCdSQRt1rXJCwWrbxS0fDgUVjOlewXuD5YGT EhDr+GclpmNyQy8pPh2d7arhQ1Ax6WLELvJbPgI8Bj/kh4ruhr77K2kGbMq34SkHMlAx PkaCDoHcoAVIgUj+cPRuX7BFkwpv9Mo1VOjKVL8px7hzyxAWpFZM/SN/+OoZ3PEOlSrD 4Cb/VHVUvRbwMKiDbko7pFhDQ+4SDxRPs/2yAhlbNZIbAnJ9MFjvQiQNCd4UaYV13J62 Ln/WkuDkiXgASB61Hnp+8lhF2gB91LE8HJfvFGaezx8iNxhXWs6HBy6iW+sz6fSjx7YR 3BbQ== X-Gm-Message-State: AKS2vOzoEVoy3EfZv0cUruQijERRI5jsIjm1CEI+LOttWky4NNNp8fdx oksm4KIjKfdIUQvZ X-Received: by 10.202.98.134 with SMTP id w128mr5475912oib.37.1497892300846; Mon, 19 Jun 2017 10:11:40 -0700 (PDT) Received: from kiwi.bld.corp.google.com ([2620:0:10f2:0:b403:80a1:2924:4bbd]) by smtp.gmail.com with ESMTPSA id k7sm2213686otd.46.2017.06.19.10.11.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 19 Jun 2017 10:11:40 -0700 (PDT) Received: by kiwi.bld.corp.google.com (Postfix, from userid 121222) id 82E77142113; Mon, 19 Jun 2017 11:11:39 -0600 (MDT) From: Simon Glass To: U-Boot Mailing List Date: Mon, 19 Jun 2017 11:11:18 -0600 Message-Id: <20170619171131.185337-2-sjg@chromium.org> X-Mailer: git-send-email 2.13.1.518.g3df882009-goog In-Reply-To: <20170619171131.185337-1-sjg@chromium.org> References: <20170619171131.185337-1-sjg@chromium.org> Cc: Michal Simek , Rob Herring , Maxime Ripard , Jagan Teki Subject: [U-Boot] [PATCH 01/14] ahci: Support non-PCI controllers X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" At present the AHCI SCSI driver only supports PCI with driver model. Rename the existing function to indicate this and add support for adding a non-PCI controller . Signed-off-by: Simon Glass --- arch/x86/cpu/ivybridge/sata.c | 2 +- drivers/ata/ahci.c | 26 +++++++++++++++++--------- include/ahci.h | 14 +++++++++++++- 3 files changed, 31 insertions(+), 11 deletions(-) diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c index 462b7c09dd..7febb8cf88 100644 --- a/arch/x86/cpu/ivybridge/sata.c +++ b/arch/x86/cpu/ivybridge/sata.c @@ -236,7 +236,7 @@ static int bd82x6x_sata_probe(struct udevice *dev) bd82x6x_sata_enable(dev); else { bd82x6x_sata_init(dev, pch); - ret = ahci_probe_scsi(dev); + ret = ahci_probe_scsi_pci(dev); if (ret) return ret; } diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 6da412d178..035db85b45 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -431,7 +431,7 @@ static void ahci_print_info(struct ahci_uc_priv *uc_priv) cap2 & (1 << 0) ? "boh " : ""); } -#ifndef CONFIG_SCSI_AHCI_PLAT +#if defined(CONFIG_DM_SCSI) || !defined(CONFIG_SCSI_AHCI_PLAT) # if defined(CONFIG_DM_PCI) || defined(CONFIG_DM_SCSI) static int ahci_init_one(struct ahci_uc_priv *uc_priv, struct udevice *dev) # else @@ -1158,11 +1158,8 @@ int ahci_bind_scsi(struct udevice *ahci_dev, struct udevice **devp) return 0; } -int ahci_probe_scsi(struct udevice *ahci_dev) +int ahci_probe_scsi(struct udevice *ahci_dev, ulong base) { -#ifdef CONFIG_SCSI_AHCI_PLAT - return -ENOSYS; /* TODO(sjg@chromium.org): Support non-PCI AHCI */ -#else struct ahci_uc_priv *uc_priv; struct scsi_platdata *uc_plat; struct udevice *dev; @@ -1172,11 +1169,11 @@ int ahci_probe_scsi(struct udevice *ahci_dev) if (!dev) return -ENODEV; uc_plat = dev_get_uclass_platdata(dev); - uc_plat->base = (ulong)dm_pci_map_bar(ahci_dev, PCI_BASE_ADDRESS_5, - PCI_REGION_MEM); + uc_plat->base = base; uc_plat->max_lun = 1; uc_plat->max_id = 2; - uc_priv = dev_get_uclass_priv(dev); + + uc_priv = dev_get_uclass_priv(ahci_dev); ret = ahci_init_one(uc_priv, dev); if (ret) return ret; @@ -1188,11 +1185,22 @@ int ahci_probe_scsi(struct udevice *ahci_dev) ret = scsi_scan_dev(dev, true); if (ret) return ret; -#endif return 0; } +#ifdef CONFIG_DM_PCI +int ahci_probe_scsi_pci(struct udevice *ahci_dev) +{ + ulong base; + + base = (ulong)dm_pci_map_bar(ahci_dev, PCI_BASE_ADDRESS_5, + PCI_REGION_MEM); + + return ahci_probe_scsi(ahci_dev, base); +} +#endif + struct scsi_ops scsi_ops = { .exec = ahci_scsi_exec, .bus_reset = ahci_scsi_bus_reset, diff --git a/include/ahci.h b/include/ahci.h index 818f34464e..29f4ba1d13 100644 --- a/include/ahci.h +++ b/include/ahci.h @@ -218,8 +218,20 @@ int ahci_bind_scsi(struct udevice *ahci_dev, struct udevice **devp); * devices it finds. * * @ahci_dev: AHCI parent device + * @base: Base address of AHCI port * @return 0 if OK, -ve on error */ -int ahci_probe_scsi(struct udevice *ahci_dev); +int ahci_probe_scsi(struct udevice *ahci_dev, ulong base); + +/** + * ahci_probe_scsi_pci() - probe and scan the attached SCSI bus on PCI + * + * Note that the SCSI device will itself bind block devices for any storage + * devices it finds. + * + * @ahci_dev: AHCI parent device + * @return 0 if OK, -ve on error + */ +int ahci_probe_scsi_pci(struct udevice *ahci_dev); #endif