From patchwork Wed Apr 26 01:30:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenyou Yang X-Patchwork-Id: 755165 X-Patchwork-Delegate: andreas.biessmann@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3wCMwy741jz9s7f for ; Wed, 26 Apr 2017 11:31:13 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 7826EC21C6A; Wed, 26 Apr 2017 01:31:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.3 required=5.0 tests=RCVD_IN_DNSWL_MED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 91313C21C27; Wed, 26 Apr 2017 01:31:05 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id EBE1DC21C27; Wed, 26 Apr 2017 01:31:03 +0000 (UTC) Received: from eusmtp01.atmel.com (eusmtp01.atmel.com [212.144.249.242]) by lists.denx.de (Postfix) with ESMTPS id 8E8D0C21C26 for ; Wed, 26 Apr 2017 01:31:03 +0000 (UTC) Received: from apsmtp01.atmel.com (10.168.254.30) by eusmtp01.atmel.com (10.145.145.30) with Microsoft SMTP Server id 14.3.235.1; Wed, 26 Apr 2017 03:30:59 +0200 Received: from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.corp.atmel.com (10.168.254.30) with Microsoft SMTP Server id 14.3.235.1; Wed, 26 Apr 2017 09:31:10 +0800 From: Wenyou Yang To: U-Boot Mailing List Date: Wed, 26 Apr 2017 09:30:42 +0800 Message-ID: <20170426013042.28718-1-wenyou.yang@atmel.com> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 Cc: Stephen Warren Subject: [U-Boot] [PATCH] clk: at91: clk-generated: Fix incorrect assignment of clock source X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Differentiate the generic clock source selection value from the parent clock index to fix the incorrect assignment of the generic clock source selection. Signed-off-by: Wenyou Yang Reviewed-by: Simon Glass --- drivers/clk/at91/clk-generated.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c index ac27d3e675..a007bfe50f 100644 --- a/drivers/clk/at91/clk-generated.c +++ b/drivers/clk/at91/clk-generated.c @@ -53,16 +53,17 @@ static ulong generic_clk_get_rate(struct clk *clk) struct clk parent; ulong clk_rate; u32 tmp, gckdiv; - u8 parent_id; + u8 clock_source, parent_index; int ret; writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr); tmp = readl(&pmc->pcr); - parent_id = (tmp >> AT91_PMC_PCR_GCKCSS_OFFSET) & - AT91_PMC_PCR_GCKCSS_MASK; + clock_source = (tmp >> AT91_PMC_PCR_GCKCSS_OFFSET) & + AT91_PMC_PCR_GCKCSS_MASK; gckdiv = (tmp >> AT91_PMC_PCR_GCKDIV_OFFSET) & AT91_PMC_PCR_GCKDIV_MASK; - ret = clk_get_by_index(dev_get_parent(clk->dev), parent_id, &parent); + parent_index = clock_source - 1; + ret = clk_get_by_index(dev_get_parent(clk->dev), parent_index, &parent); if (ret) return 0; @@ -82,7 +83,7 @@ static ulong generic_clk_set_rate(struct clk *clk, ulong rate) ulong tmp_rate, best_rate = rate, parent_rate; int tmp_diff, best_diff = -1; u32 div, best_div = 0; - u8 best_parent_id = 0; + u8 best_parend_index, best_clock_source = 0; u8 i; u32 tmp; int ret; @@ -108,7 +109,8 @@ static ulong generic_clk_set_rate(struct clk *clk, ulong rate) best_div = div - 1; best_parent = parent; - best_parent_id = i; + best_parend_index = i; + best_clock_source = best_parend_index + 1; } if (!best_diff || tmp_rate < rate) @@ -129,7 +131,7 @@ static ulong generic_clk_set_rate(struct clk *clk, ulong rate) writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr); tmp = readl(&pmc->pcr); tmp &= ~(AT91_PMC_PCR_GCKDIV | AT91_PMC_PCR_GCKCSS); - tmp |= AT91_PMC_PCR_GCKCSS_(best_parent_id) | + tmp |= AT91_PMC_PCR_GCKCSS_(best_clock_source) | AT91_PMC_PCR_CMD_WRITE | AT91_PMC_PCR_GCKDIV_(best_div) | AT91_PMC_PCR_GCKEN;