Message ID | 20170419134439.17255-1-slemieux.tyco@gmail.com |
---|---|
State | Superseded |
Delegated to: | Marek Vasut |
Headers | show |
On 04/19/2017 03:44 PM, Sylvain Lemieux wrote: > From: Liam Beguin <lbeguin@tycoint.com> > > Add DM support for i2c functions. > > Signed-off-by: Liam Beguin <lbeguin@tycoint.com> > Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> > --- > Changes from v1 to v2: > * Do not request udevice on each single i2c write. > > Note: > * This patch is require as part of the DM support of the LPC32xx I2C driver. > All I2C drivers should be converted, to DM, by the end of June 2017. > > * The USB driver is supporting the DM and non-DM API. > > * Once the ustream LPC32xx boards (devkit3250 & work_92105) are migrated > to DM (I2C), the non-DM API support can be remove from this driver. > > drivers/usb/host/ohci-lpc32xx.c | 68 ++++++++++++++++++++++++++++++----------- > 1 file changed, 51 insertions(+), 17 deletions(-) > > diff --git a/drivers/usb/host/ohci-lpc32xx.c b/drivers/usb/host/ohci-lpc32xx.c > index 9245126ed6..fe4826b23d 100644 > --- a/drivers/usb/host/ohci-lpc32xx.c > +++ b/drivers/usb/host/ohci-lpc32xx.c > @@ -14,8 +14,10 @@ > #include <asm/io.h> > #include <asm/arch/cpu.h> > #include <asm/arch/clk.h> > +#include <asm/arch/i2c.h> > #include <usb.h> > #include <i2c.h> > +#include <dm.h> > > /* OTG I2C controller module register structures */ > struct otgi2c_regs { > @@ -81,14 +83,23 @@ struct otg_regs { > static struct otg_regs *otg = (struct otg_regs *)USB_BASE; > static struct clk_pm_regs *clk_pwr = (struct clk_pm_regs *)CLK_PM_BASE; > > -static int isp1301_set_value(int reg, u8 value) > +#ifndef CONFIG_DM_I2C If you just defined struct udevice if DM is not defined, you could have ifdef only inside this function. It's a nit though. Since this is DM, I want a review from Simon. > +static int isp1301_set_value(void *dev, int reg, u8 value) > { > return i2c_write(ISP1301_I2C_ADDR, reg, 1, &value, 1); > } > +#else > +static int isp1301_set_value(struct udevice *dev, int reg, u8 value) > +{ > + return dm_i2c_write(dev, reg, &value, 1); > +} > +#endif > > -static void isp1301_configure(void) > +static void isp1301_configure(struct udevice *dev) > { > +#ifndef CONFIG_DM_I2C > i2c_set_bus_num(I2C_2); > +#endif > > /* > * LPC32XX only supports DAT_SE0 USB mode > @@ -96,23 +107,23 @@ static void isp1301_configure(void) > */ > > /* Disable transparent UART mode first */ > - isp1301_set_value(ISP1301_I2C_MODE_CONTROL_1_CLR, MC1_UART_EN); > + isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_1_CLR, MC1_UART_EN); > > - isp1301_set_value(ISP1301_I2C_MODE_CONTROL_1_CLR, ~MC1_SPEED_REG); > - isp1301_set_value(ISP1301_I2C_MODE_CONTROL_1_SET, MC1_SPEED_REG); > - isp1301_set_value(ISP1301_I2C_MODE_CONTROL_2_CLR, ~0); > - isp1301_set_value(ISP1301_I2C_MODE_CONTROL_2_SET, > + isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_1_CLR, ~MC1_SPEED_REG); > + isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_1_SET, MC1_SPEED_REG); > + isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_2_CLR, ~0); > + isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_2_SET, > MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL); > > - isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_CLR, ~0); > - isp1301_set_value(ISP1301_I2C_MODE_CONTROL_1_SET, MC1_DAT_SE0); > - isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_SET, > + isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_CLR, ~0); > + isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_1_SET, MC1_DAT_SE0); > + isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_SET, > OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN); > - isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_CLR, > + isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_CLR, > OTG1_DM_PULLUP | OTG1_DP_PULLUP); > - isp1301_set_value(ISP1301_I2C_INTERRUPT_LATCH_CLR, ~0); > - isp1301_set_value(ISP1301_I2C_INTERRUPT_FALLING_CLR, ~0); > - isp1301_set_value(ISP1301_I2C_INTERRUPT_RISING_CLR, ~0); > + isp1301_set_value(dev, ISP1301_I2C_INTERRUPT_LATCH_CLR, ~0); > + isp1301_set_value(dev, ISP1301_I2C_INTERRUPT_FALLING_CLR, ~0); > + isp1301_set_value(dev, ISP1301_I2C_INTERRUPT_RISING_CLR, ~0); > > /* Enable usb_need_clk clock after transceiver is initialized */ > setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_USBDVND_EN); > @@ -149,6 +160,17 @@ static int usbpll_setup(void) > int usb_cpu_init(void) > { > u32 ret; > +#ifndef CONFIG_DM_I2C > + void *dev = NULL; > +#else > + struct udevice *dev; > + > + ret = i2c_get_chip_for_busnum(I2C_2, ISP1301_I2C_ADDR, 1, &dev); > + if (ret) { > + debug("%s: No bus %d\n", __func__, I2C_2); > + return ret; > + } > +#endif > > /* > * USB pins routing setup is done by "lpc32xx_usb_init()" and should > @@ -167,7 +189,7 @@ int usb_cpu_init(void) > return ret; > > /* Configure ISP1301 */ > - isp1301_configure(); > + isp1301_configure(dev); > > /* setup USB clocks and PLL */ > ret = usbpll_setup(); > @@ -188,15 +210,27 @@ int usb_cpu_init(void) > return ret; > > setbits_le32(&otg->otg_sts_ctrl, OTG_HOST_EN); > - isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV); > + isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV); > > return 0; > } > > int usb_cpu_stop(void) > { > +#ifndef CONFIG_DM_I2C > + void *dev = NULL; > +#else > + int ret; > + struct udevice *dev; > + > + ret = i2c_get_chip_for_busnum(I2C_2, ISP1301_I2C_ADDR, 1, &dev); > + if (ret) { > + debug("%s: No bus %d\n", __func__, I2C_2); > + return ret; > + } > +#endif > /* vbus off */ > - isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV); > + isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV); > > clrbits_le32(&otg->otg_sts_ctrl, OTG_HOST_EN); > >
diff --git a/drivers/usb/host/ohci-lpc32xx.c b/drivers/usb/host/ohci-lpc32xx.c index 9245126ed6..fe4826b23d 100644 --- a/drivers/usb/host/ohci-lpc32xx.c +++ b/drivers/usb/host/ohci-lpc32xx.c @@ -14,8 +14,10 @@ #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/clk.h> +#include <asm/arch/i2c.h> #include <usb.h> #include <i2c.h> +#include <dm.h> /* OTG I2C controller module register structures */ struct otgi2c_regs { @@ -81,14 +83,23 @@ struct otg_regs { static struct otg_regs *otg = (struct otg_regs *)USB_BASE; static struct clk_pm_regs *clk_pwr = (struct clk_pm_regs *)CLK_PM_BASE; -static int isp1301_set_value(int reg, u8 value) +#ifndef CONFIG_DM_I2C +static int isp1301_set_value(void *dev, int reg, u8 value) { return i2c_write(ISP1301_I2C_ADDR, reg, 1, &value, 1); } +#else +static int isp1301_set_value(struct udevice *dev, int reg, u8 value) +{ + return dm_i2c_write(dev, reg, &value, 1); +} +#endif -static void isp1301_configure(void) +static void isp1301_configure(struct udevice *dev) { +#ifndef CONFIG_DM_I2C i2c_set_bus_num(I2C_2); +#endif /* * LPC32XX only supports DAT_SE0 USB mode @@ -96,23 +107,23 @@ static void isp1301_configure(void) */ /* Disable transparent UART mode first */ - isp1301_set_value(ISP1301_I2C_MODE_CONTROL_1_CLR, MC1_UART_EN); + isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_1_CLR, MC1_UART_EN); - isp1301_set_value(ISP1301_I2C_MODE_CONTROL_1_CLR, ~MC1_SPEED_REG); - isp1301_set_value(ISP1301_I2C_MODE_CONTROL_1_SET, MC1_SPEED_REG); - isp1301_set_value(ISP1301_I2C_MODE_CONTROL_2_CLR, ~0); - isp1301_set_value(ISP1301_I2C_MODE_CONTROL_2_SET, + isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_1_CLR, ~MC1_SPEED_REG); + isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_1_SET, MC1_SPEED_REG); + isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_2_CLR, ~0); + isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_2_SET, MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL); - isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_CLR, ~0); - isp1301_set_value(ISP1301_I2C_MODE_CONTROL_1_SET, MC1_DAT_SE0); - isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_SET, + isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_CLR, ~0); + isp1301_set_value(dev, ISP1301_I2C_MODE_CONTROL_1_SET, MC1_DAT_SE0); + isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN); - isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_CLR, + isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_CLR, OTG1_DM_PULLUP | OTG1_DP_PULLUP); - isp1301_set_value(ISP1301_I2C_INTERRUPT_LATCH_CLR, ~0); - isp1301_set_value(ISP1301_I2C_INTERRUPT_FALLING_CLR, ~0); - isp1301_set_value(ISP1301_I2C_INTERRUPT_RISING_CLR, ~0); + isp1301_set_value(dev, ISP1301_I2C_INTERRUPT_LATCH_CLR, ~0); + isp1301_set_value(dev, ISP1301_I2C_INTERRUPT_FALLING_CLR, ~0); + isp1301_set_value(dev, ISP1301_I2C_INTERRUPT_RISING_CLR, ~0); /* Enable usb_need_clk clock after transceiver is initialized */ setbits_le32(&clk_pwr->usb_ctrl, CLK_USBCTRL_USBDVND_EN); @@ -149,6 +160,17 @@ static int usbpll_setup(void) int usb_cpu_init(void) { u32 ret; +#ifndef CONFIG_DM_I2C + void *dev = NULL; +#else + struct udevice *dev; + + ret = i2c_get_chip_for_busnum(I2C_2, ISP1301_I2C_ADDR, 1, &dev); + if (ret) { + debug("%s: No bus %d\n", __func__, I2C_2); + return ret; + } +#endif /* * USB pins routing setup is done by "lpc32xx_usb_init()" and should @@ -167,7 +189,7 @@ int usb_cpu_init(void) return ret; /* Configure ISP1301 */ - isp1301_configure(); + isp1301_configure(dev); /* setup USB clocks and PLL */ ret = usbpll_setup(); @@ -188,15 +210,27 @@ int usb_cpu_init(void) return ret; setbits_le32(&otg->otg_sts_ctrl, OTG_HOST_EN); - isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV); + isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV); return 0; } int usb_cpu_stop(void) { +#ifndef CONFIG_DM_I2C + void *dev = NULL; +#else + int ret; + struct udevice *dev; + + ret = i2c_get_chip_for_busnum(I2C_2, ISP1301_I2C_ADDR, 1, &dev); + if (ret) { + debug("%s: No bus %d\n", __func__, I2C_2); + return ret; + } +#endif /* vbus off */ - isp1301_set_value(ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV); + isp1301_set_value(dev, ISP1301_I2C_OTG_CONTROL_1_SET, OTG1_VBUS_DRV); clrbits_le32(&otg->otg_sts_ctrl, OTG_HOST_EN);