From patchwork Fri Apr 14 00:51:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenyou Yang X-Patchwork-Id: 750671 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3w3zsh28P9z9sNb for ; Fri, 14 Apr 2017 11:02:48 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 05BB9C21C70; Fri, 14 Apr 2017 01:00:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.8 required=5.0 tests=UPPERCASE_50_75 autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C6932C21C4F; Fri, 14 Apr 2017 01:00:29 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id BA28EC21C41; Fri, 14 Apr 2017 01:00:11 +0000 (UTC) Received: from eusmtp01.atmel.com (eusmtp01.atmel.com [212.144.249.242]) by lists.denx.de (Postfix) with ESMTPS id 4A3E5C21C5A for ; Fri, 14 Apr 2017 01:00:06 +0000 (UTC) Received: from apsmtp01.atmel.com (10.168.254.31) by eusmtp01.atmel.com (10.145.145.30) with Microsoft SMTP Server id 14.3.235.1; Fri, 14 Apr 2017 02:59:55 +0200 Received: from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.atmel.com (10.168.254.31) with Microsoft SMTP Server id 14.3.235.1; Fri, 14 Apr 2017 09:07:22 +0800 From: Wenyou Yang To: U-Boot Mailing List Date: Fri, 14 Apr 2017 08:51:45 +0800 Message-ID: <20170414005148.25042-5-wenyou.yang@atmel.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170414005148.25042-1-wenyou.yang@atmel.com> References: <20170414005148.25042-1-wenyou.yang@atmel.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH v5 4/6] board: sama5d3_xplained: Update to support DM/DT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Update the configuration files to support the device tree and driver model, so do SPL. The device clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None configs/sama5d3_xplained_mmc_defconfig | 29 +++++++++++++++++++++++++++- configs/sama5d3_xplained_nandflash_defconfig | 28 ++++++++++++++++++++++++++- include/configs/sama5d3_xplained.h | 26 +++---------------------- 3 files changed, 58 insertions(+), 25 deletions(-) diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 2654aa11ba..921b6a2112 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -4,15 +4,19 @@ CONFIG_TARGET_SAMA5D3_XPLAINED=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y +CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set @@ -29,6 +33,29 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_UBI=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_AT91=y +CONFIG_AT91_UTMI=y +CONFIG_AT91_H32MX=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y +CONFIG_DM_MMC=y +CONFIG_GENERIC_ATMEL_MCI=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_ATMEL_USART=y CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index dc487d92e0..042f6a78e7 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -6,6 +6,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 @@ -27,6 +30,29 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_UBI=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_AT91=y +CONFIG_AT91_UTMI=y +CONFIG_AT91_H32MX=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y +CONFIG_DM_MMC=y +CONFIG_GENERIC_ATMEL_MCI=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_ATMEL_USART=y CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 3c9f49e426..b4a62bd63a 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -12,11 +12,6 @@ #include "at91-sama5_common.h" -/* serial console */ -#define CONFIG_ATMEL_USART -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_DBGU - /* * This needs to be defined for the OHCI code to work but it is defined as * ATMEL_ID_UHPHS in the CPU specific header files. @@ -34,10 +29,10 @@ #define CONFIG_SYS_SDRAM_SIZE 0x10000000 #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_INIT_SP_ADDR 0x310000 +#define CONFIG_SYS_INIT_SP_ADDR 0x318000 #else #define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) + (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) #endif /* NAND flash */ @@ -67,21 +62,6 @@ #define CONFIG_CMD_UBIFS #endif -/* Ethernet Hardware */ -#define CONFIG_MACB -#define CONFIG_RMII -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_MACB_SEARCH_PHY -#define CONFIG_RGMII -#define CONFIG_PHYLIB - -/* MMC */ - -#ifdef CONFIG_CMD_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#define CONFIG_ATMEL_MCI_8BIT -#endif - /* USB */ #ifdef CONFIG_CMD_USB @@ -111,7 +91,7 @@ /* SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x300000 -#define CONFIG_SPL_MAX_SIZE 0x10000 +#define CONFIG_SPL_MAX_SIZE 0x18000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000