| Message ID | 20170218184640.30635-4-heiko@sntech.de |
|---|---|
| State | Accepted |
| Commit | bd7e6086c5a1e83975fa87f7958b52c5d23881fb |
| Delegated to: | Simon Glass |
| Headers | show |
On 18 February 2017 at 11:46, Heiko Stuebner <heiko@sntech.de> wrote: > Use defines to describe the bit shifts used to create the > table for ddrconf register values. > > Signed-off-by: Heiko Stuebner <heiko@sntech.de> > --- > arch/arm/include/asm/arch-rockchip/ddr_rk3288.h | 8 ++++++++ > arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 20 ++++++++++---------- > 2 files changed, 18 insertions(+), 10 deletions(-) Acked-by: Simon Glass <sjg@chromium.org>
On 21 February 2017 at 11:08, Simon Glass <sjg@chromium.org> wrote: > On 18 February 2017 at 11:46, Heiko Stuebner <heiko@sntech.de> wrote: >> Use defines to describe the bit shifts used to create the >> table for ddrconf register values. >> >> Signed-off-by: Heiko Stuebner <heiko@sntech.de> >> --- >> arch/arm/include/asm/arch-rockchip/ddr_rk3288.h | 8 ++++++++ >> arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 20 ++++++++++---------- >> 2 files changed, 18 insertions(+), 10 deletions(-) > > Acked-by: Simon Glass <sjg@chromium.org> Applied to u-boot-rockchip, thanks!
diff --git a/arch/arm/include/asm/arch-rockchip/ddr_rk3288.h b/arch/arm/include/asm/arch-rockchip/ddr_rk3288.h index fccabcd2c0..9a59075afc 100644 --- a/arch/arm/include/asm/arch-rockchip/ddr_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/ddr_rk3288.h @@ -425,6 +425,14 @@ enum { #define START_CMD (1u << 31) +/* + * DDRCONF + * [5:4] row(13+n) + * [1:0] col(9+n), assume bw=2 + */ +#define DDRCONF_ROW_SHIFT 4 +#define DDRCONF_COL_SHIFT 0 + /* DEVTODEV */ #define BUSWRTORD_SHIFT 4 #define BUSRDTOWR_SHIFT 2 diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c index be3d713202..41661046af 100644 --- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c @@ -596,16 +596,16 @@ static void dram_all_config(const struct dram_info *dram, const int ddrconf_table[] = { /* row col,bw */ 0, - ((1 << 4) | 1), - ((2 << 4) | 1), - ((3 << 4) | 1), - ((4 << 4) | 1), - ((1 << 4) | 2), - ((2 << 4) | 2), - ((3 << 4) | 2), - ((1 << 4) | 0), - ((2 << 4) | 0), - ((3 << 4) | 0), + ((1 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT), + ((2 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT), + ((3 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT), + ((4 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT), + ((1 << DDRCONF_ROW_SHIFT) | 2 << DDRCONF_COL_SHIFT), + ((2 << DDRCONF_ROW_SHIFT) | 2 << DDRCONF_COL_SHIFT), + ((3 << DDRCONF_ROW_SHIFT) | 2 << DDRCONF_COL_SHIFT), + ((1 << DDRCONF_ROW_SHIFT) | 0 << DDRCONF_COL_SHIFT), + ((2 << DDRCONF_ROW_SHIFT) | 0 << DDRCONF_COL_SHIFT), + ((3 << DDRCONF_ROW_SHIFT) | 0 << DDRCONF_COL_SHIFT), 0, 0, 0,
Use defines to describe the bit shifts used to create the table for ddrconf register values. Signed-off-by: Heiko Stuebner <heiko@sntech.de> --- arch/arm/include/asm/arch-rockchip/ddr_rk3288.h | 8 ++++++++ arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 20 ++++++++++---------- 2 files changed, 18 insertions(+), 10 deletions(-)