From patchwork Wed Dec 28 18:50:49 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 709397 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3tphfd72kbz9snk for ; Thu, 29 Dec 2016 05:51:53 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=aosc.xyz header.i=@aosc.xyz header.b="tDxZET9H"; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 50B65B3901; Wed, 28 Dec 2016 19:51:52 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1S3fjFULfUwa; Wed, 28 Dec 2016 19:51:51 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 73FB7B38E6; Wed, 28 Dec 2016 19:51:51 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4BD84B38E6 for ; Wed, 28 Dec 2016 19:51:47 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TtnJOFvnejRS for ; Wed, 28 Dec 2016 19:51:47 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from forward4j.cmail.yandex.net (forward4j.cmail.yandex.net [5.255.227.22]) by theia.denx.de (Postfix) with ESMTPS id 062FAA75E4 for ; Wed, 28 Dec 2016 19:51:44 +0100 (CET) Received: from smtp3h.mail.yandex.net (smtp3h.mail.yandex.net [IPv6:2a02:6b8:0:f05::117]) by forward4j.cmail.yandex.net (Yandex) with ESMTP id 70B942074C; Wed, 28 Dec 2016 21:51:43 +0300 (MSK) Received: from smtp3h.mail.yandex.net (localhost.localdomain [127.0.0.1]) by smtp3h.mail.yandex.net (Yandex) with ESMTP id AB272440BD0; Wed, 28 Dec 2016 21:51:39 +0300 (MSK) Received: by smtp3h.mail.yandex.net (nwsmtp/Yandex) with ESMTPSA id ew0nl4S6TH-pXuSjSio; Wed, 28 Dec 2016 21:51:37 +0300 (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client certificate not present) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aosc.xyz; s=mail; t=1482951098; bh=89oKvw1mTPmt3EIQOHar77OY9YnyMLYRdQxxrHL+9iA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=tDxZET9HpMzCD9sxb2NeV632FU6IIyIFKyflIvLtf6X24nxiEqsUMlEdacs8CRwxl GgIz6KkYMonCvg4XIo+HWBAdAxR3CvBbFM/Qrn4rxQYg1Ju44kxCaWr3e/UPn8SVLx zXPHdJ8Tsw9LpkHd6NUrHM52GIxdrcfQ67rl5sMU= Authentication-Results: smtp3h.mail.yandex.net; dkim=pass header.i=@aosc.xyz X-Yandex-Suid-Status: 1 0,1 0,1 0,1 0,1 0,1 0,1 0 From: Icenowy Zheng To: Jagan Teki , Maxime Ripard , Chen-Yu Tsai , Jens Kuske , Andre Przywara Date: Thu, 29 Dec 2016 02:50:49 +0800 Message-Id: <20161228185049.15953-2-icenowy@aosc.xyz> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20161228185049.15953-1-icenowy@aosc.xyz> References: <20161228185049.15953-1-icenowy@aosc.xyz> Cc: u-boot@lists.denx.de, linux-sunxi@googlegroups.com Subject: [U-Boot] [PATCH] sunxi: H3/A64: fix non-ODT setting X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Andre Przywara According to Jens disabling the on-die-termination should set bit 5, not bit 1 in the respective register. Fix this. Reported-by: Jens Kuske Signed-off-by: Andre Przywara --- arch/arm/mach-sunxi/dram_sun8i_h3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c b/arch/arm/mach-sunxi/dram_sun8i_h3.c index b08b8e67cc..8e2527dee1 100644 --- a/arch/arm/mach-sunxi/dram_sun8i_h3.c +++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c @@ -347,7 +347,7 @@ static int mctl_channel_init(struct dram_para *para) clrsetbits_le32(&mctl_ctl->datx[i].gcr, (0x3 << 4) | (0x1 << 1) | (0x3 << 2) | (0x3 << 12) | (0x3 << 14), - IS_ENABLED(CONFIG_DRAM_ODT_EN) ? 0x0 : 0x2); + IS_ENABLED(CONFIG_DRAM_ODT_EN) ? 0x0 : 0x20); /* AC PDR should always ON */ setbits_le32(&mctl_ctl->aciocr, 0x1 << 1);