From patchwork Mon Dec 19 14:38:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 707112 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3tj3Sy38Ggz9vG0 for ; Tue, 20 Dec 2016 01:38:58 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DFCD6B38BD; Mon, 19 Dec 2016 15:38:49 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CWCAmiSk4UNi; Mon, 19 Dec 2016 15:38:49 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2555DB38E4; Mon, 19 Dec 2016 15:38:45 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0F44FB38B5 for ; Mon, 19 Dec 2016 15:38:41 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7Q_kwJTsiDvt for ; Mon, 19 Dec 2016 15:38:41 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by theia.denx.de (Postfix) with ESMTPS id 9F5A7B38C7 for ; Mon, 19 Dec 2016 15:38:36 +0100 (CET) Received: from marcel-pc.toradex.int ([46.140.72.82]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPA (Nemesis) id 0MGQI2-1cNKfC0vke-00DEvO; Mon, 19 Dec 2016 15:38:26 +0100 From: Marcel Ziswiler To: u-boot@lists.denx.de Date: Mon, 19 Dec 2016 15:38:06 +0100 Message-Id: <20161219143807.5479-4-marcel@ziswiler.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20161219143807.5479-1-marcel@ziswiler.com> References: <20161219143807.5479-1-marcel@ziswiler.com> X-Provags-ID: V03:K0:QxVm/5csTmlGCMXDwNPsOOz0fknVW3KFNKxRYQD5CAWnB5r8eum YraXI5zHrHJBVtBsyQnZ4fpDJVGbova/gBrZpAnFc+DXuP+9qigNOhsaKEBQV64XTDYQRjJ x/5Gioxq8yW08l42hIyjcQ5uKUSidcnhYTkBwJhj/shLnpwD7sNPekK7QQod7UDZpMGzIrA JXWzw4j0h+TGn9iHkPEcw== X-UI-Out-Filterresults: notjunk:1; V01:K0:ogtza40P72I=:JLQ3DXnueTSljaGZHs2lAj y/HiM0jALhcHcTX1BI6wANDLK6aWiMkRra3/XtrSJjzIreJ8rZ4wtjR57CEdmDTme0wUnlSO0 19Eh4vw7NheJhLiBNebLIefzkrDnlGePysYEEFa6GL+sMjVVuGaBlhJ+EHNJgCFqkv/93wbkL d6MEyqEn+lVltEXlJLYmN9c2hp9L7DSXWqrLkTxgIHsyCQruaKtJodY8uVx0qv5SMv19VgCO6 XZyHXIXiZR2gOAjSQzTlyUrfg3uI893zC2Ks87cn7/qBz0vp7TIhPco2ueEgB1dZOnD9jJZlH jJjpFl1D5Z5ZPMOUoguRDqks9y4hP3P9eLCDIMomP+4o83FD0aSV56irZlG146EXpLuOl9KK+ yG6Q6j4bYasZaTxknMV8XK/gybC9BuBfsa+njL/By2QUoqJyvN2AxZyvTe0Q9BsTwEBYic+UK tIptS2b6UBSFI3e8RJqT0Ccf57QUC0rVia4aUE6Px1yemKd2oCqWZPmOWiU2Lq/R0nQtPnuAT pC0p65TCxxHdj4a+tAduA4w9dsFOVy72a3n2xzmSI1Hdm8B1r8ephgUVP9bT0YbmjOQlFpaLg ngQcBnT56P+JLQL6qDbA80dkQ0IpiY7gKdR+FFee6aHz9l2Di3ESjNo27aleyu6/AB7ttRemY 4HKnPN1atpGtkpJXh2gY+r34eeGADiHlK4EbJLxeY5xN/vaJalKri/OqKwJJNtCEyvqs= Cc: Albert Aribaud , Stephen Warren , Stefan Agner , Marcel Ziswiler , Tom Warren , Max Krummenacher Subject: [U-Boot] [PATCH 3/4] apalis_t30: comment about disabled pcie nodes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Marcel Ziswiler Add a comment about the disabled PCIe port nodes. Signed-off-by: Marcel Ziswiler Reviewed-by: Simon Glass --- arch/arm/dts/tegra30-apalis.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/dts/tegra30-apalis.dts b/arch/arm/dts/tegra30-apalis.dts index f83f094..9e4ab8c 100644 --- a/arch/arm/dts/tegra30-apalis.dts +++ b/arch/arm/dts/tegra30-apalis.dts @@ -44,10 +44,12 @@ hvdd-pex-supply = <&sys_3v3_reg>; pci@1,0 { + /* TS_DIFF1/2/3/4 left disabled */ nvidia,num-lanes = <4>; }; pci@2,0 { + /* PCIE1_RX/TX left disabled */ nvidia,num-lanes = <1>; };