From patchwork Mon Dec 19 07:26:31 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 706981 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3thsvl4CRnz9t1Q for ; Mon, 19 Dec 2016 18:28:03 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Cv1cenah"; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A0F30B38C6; Mon, 19 Dec 2016 08:27:08 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 47qS7IlyKK73; Mon, 19 Dec 2016 08:27:08 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4F030B38CF; Mon, 19 Dec 2016 08:27:04 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0DE22B38D0 for ; Mon, 19 Dec 2016 08:27:01 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QTHGgjY3MyF6 for ; Mon, 19 Dec 2016 08:27:00 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pg0-f66.google.com (mail-pg0-f66.google.com [74.125.83.66]) by theia.denx.de (Postfix) with ESMTPS id 462CAB38BC for ; Mon, 19 Dec 2016 08:26:48 +0100 (CET) Received: by mail-pg0-f66.google.com with SMTP id g1so5781832pgn.0 for ; Sun, 18 Dec 2016 23:26:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=ZCMUqjFiuNq3DxonClC2ocbz6p8/PhyhJLozZEGPYOo=; b=Cv1cenahvTSKyGMlIbb4jBkEHeBhv65ilxYiATNbhBkPdZCH2fVIMaQ4y4c6ovxK8Y yy0ETv5/qRZTo5pPu31GFrVnm8NEYDrX07Fe8DlnPJVCtLmENiWxjRZIaMXxWw/8gxRk EhZ0+UwTXml7CMaOIyTbU8OMX2A8h1myiX6LumfhLUpxPClQzUljypKTZ98FLI1JdUNY irF92VZNVAJuCP2YwQ4JGIpUQorRNaVjrU9ZK8ClfHb0bZ+H+lnf5vZ5X3PYokM7NN5M 9gsxeR9YGu8ZFRkF5nJS2LwS7koFdJbGwTXsVjGDdd744VEWTaucwOuAK8kWc2PJ4lsZ vLnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ZCMUqjFiuNq3DxonClC2ocbz6p8/PhyhJLozZEGPYOo=; b=q05m6NNPK3j1ybmG29TvmuscxQUmduoPTpzIAPQLJChrc39avxg/Koqq+mpYBbtrGL u7Frtk+Gb/b7ZawuopLEcTs0f2E7+zhqXCn8sxdVuM9SLSQNR9L7lDjZG/UmVEPACBoE qcwN49yWbn8pAeeJPGLTU2ejA53RtZuE2yjxmYEO5BgNQ+9IlNC2FKLsLbgNxk7Xx6KD z3ghsOTlHmZAEQg9eRg0hVakQa7QUENMHlJ4NWerg9jIxTfLOg6gs+eCeJzxPenEp2yQ UYCmKbUb42YcFK2d1MfoA3IJjHz+PjnbmnrzZPDuHxaTvT5gbwBV5/rj3OdmBLz4MxQQ Y/Ig== X-Gm-Message-State: AIkVDXLWv17irFKE48sGFcFN1GIqv3te36e0FGJTEVIDgz5oEQD9w2Uf+X/6YukXq+p6sA== X-Received: by 10.84.217.5 with SMTP id o5mr12645272pli.85.1482132407263; Sun, 18 Dec 2016 23:26:47 -0800 (PST) Received: from chrisp-dl.atlnz.lc ([2001:df5:b000:22:c804:a52c:e614:fbf4]) by smtp.gmail.com with ESMTPSA id p25sm28673340pfk.20.2016.12.18.23.26.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 18 Dec 2016 23:26:46 -0800 (PST) From: Chris Packham To: york.sun@nxp.com, galak@kernel.crashing.org Date: Mon, 19 Dec 2016 20:26:31 +1300 Message-Id: <20161219072631.26904-1-judge.packham@gmail.com> X-Mailer: git-send-email 2.11.0.24.ge6920cf Cc: Kim Phillips , u-boot@lists.denx.de, Andy Fleming , Stefan Roese , Chris Packham Subject: [U-Boot] [RESEND PATCH v2] powerpc: Retain compatible property for L2 cache X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" When setting the compatible property for the L2 cache ensure that we follow the documented binding by setting both "-l2-cache-controller" and "cache" as values. Signed-off-by: Chris Packham --- Changes in v2: - extract a helper function to set the compatible property and use it in both the CONFIG_L2_CACHE and CONFIG_BACKSIDE_L2_CACHE cases. arch/powerpc/cpu/mpc85xx/fdt.c | 61 +++++++++++++++++++++++++----------------- 1 file changed, 36 insertions(+), 25 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 12001f85e9fd..67140ba9ee18 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -180,6 +180,39 @@ static inline void ft_fixup_l3cache(void *blob, int off) #define ft_fixup_l3cache(x, y) #endif +#if defined(CONFIG_L2_CACHE) || \ + defined(CONFIG_BACKSIDE_L2_CACHE) || \ + defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) +static inline void ft_fixup_l2cache_compatible(void *blob, int off) +{ + int len; + struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr())); + + if (cpu) { + char buf[40]; + + if (isdigit(cpu->name[0])) { + /* MPCxxxx, where xxxx == 4-digit number */ + len = sprintf(buf, "fsl,mpc%s-l2-cache-controller", + cpu->name) + 1; + } else { + /* Pxxxx or Txxxx, where xxxx == 4-digit number */ + len = sprintf(buf, "fsl,%c%s-l2-cache-controller", + tolower(cpu->name[0]), cpu->name + 1) + 1; + } + + /* + * append "cache" after the NULL character that the previous + * sprintf wrote. This is how a device tree stores multiple + * strings in a property. + */ + len += sprintf(buf + len, "cache") + 1; + + fdt_setprop(blob, off, "compatible", buf, len); + } +} +#endif + #if defined(CONFIG_L2_CACHE) /* return size in kilobytes */ static inline u32 l2cache_size(void) @@ -215,9 +248,8 @@ static inline u32 l2cache_size(void) static inline void ft_fixup_l2cache(void *blob) { - int len, off; + int off; u32 *ph; - struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr())); const u32 line_size = 32; const u32 num_ways = 8; @@ -243,28 +275,7 @@ static inline void ft_fixup_l2cache(void *blob) return ; } - if (cpu) { - char buf[40]; - - if (isdigit(cpu->name[0])) { - /* MPCxxxx, where xxxx == 4-digit number */ - len = sprintf(buf, "fsl,mpc%s-l2-cache-controller", - cpu->name) + 1; - } else { - /* Pxxxx or Txxxx, where xxxx == 4-digit number */ - len = sprintf(buf, "fsl,%c%s-l2-cache-controller", - tolower(cpu->name[0]), cpu->name + 1) + 1; - } - - /* - * append "cache" after the NULL character that the previous - * sprintf wrote. This is how a device tree stores multiple - * strings in a property. - */ - len += sprintf(buf + len, "cache") + 1; - - fdt_setprop(blob, off, "compatible", buf, len); - } + ft_fixup_l2cache_compatible(blob, off); fdt_setprop(blob, off, "cache-unified", NULL, 0); fdt_setprop_cell(blob, off, "cache-block-size", line_size); fdt_setprop_cell(blob, off, "cache-size", size); @@ -337,7 +348,7 @@ static inline void ft_fixup_l2cache(void *blob) fdt_setprop_cell(blob, l2_off, "cache-size", size); fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets); fdt_setprop_cell(blob, l2_off, "cache-level", 2); - fdt_setprop(blob, l2_off, "compatible", "cache", 6); + ft_fixup_l2cache_compatible(blob, l2_off); } if (l3_off < 0) {