From patchwork Fri Nov 25 22:32:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 699420 X-Patchwork-Delegate: daniel.schwierzeck@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3tQW965TQ4z9vF7 for ; Sat, 26 Nov 2016 09:34:50 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 96945B3872; Fri, 25 Nov 2016 23:33:58 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id S5_bbkoCdKaQ; Fri, 25 Nov 2016 23:33:58 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4904DB385C; Fri, 25 Nov 2016 23:33:27 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F27E3B3850 for ; Fri, 25 Nov 2016 23:33:04 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Y79Cjal6vVPe for ; Fri, 25 Nov 2016 23:33:04 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by theia.denx.de (Postfix) with ESMTPS id 44557A757A for ; Fri, 25 Nov 2016 23:32:55 +0100 (CET) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 3tQW6v1Tcxz3hjNd; Fri, 25 Nov 2016 23:32:55 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.68]) by mail.m-online.net (Postfix) with ESMTP id 3tQW6v1KfFzvyPN; Fri, 25 Nov 2016 23:32:55 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.68]) (amavisd-new, port 10024) with ESMTP id tfpGKOrQwCdY; Fri, 25 Nov 2016 23:32:54 +0100 (CET) X-Auth-Info: Ku1Lkq7C79+HLNt+DWDb59+w7gO2L3dMZmjnCt3FIB8= Received: from chi.lan (unknown [195.140.253.167]) by mail.mnet-online.de (Postfix) with ESMTPA; Fri, 25 Nov 2016 23:32:54 +0100 (CET) From: Marek Vasut To: u-boot@lists.denx.de Date: Fri, 25 Nov 2016 23:32:30 +0100 Message-Id: <20161125223235.3434-9-marex@denx.de> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20161125223235.3434-1-marex@denx.de> References: <20161125223235.3434-1-marex@denx.de> Cc: Marek Vasut Subject: [U-Boot] [PATCH 09/14] gpio: Add JZ47xx GPIO driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Paul Burton Add primitive GPIO controller driver for the JZ47xx SoC. Signed-off-by: Marek Vasut Cc: Daniel Schwierzeck Cc: Paul Burton --- drivers/gpio/Kconfig | 8 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-jz47xx.c | 79 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 88 insertions(+) create mode 100644 drivers/gpio/gpio-jz47xx.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 8d9ab52..4515883 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -221,4 +221,12 @@ config MPC85XX_GPIO The driver has been tested on MPC85XX, but it is likely that other PowerQUICC III devices will work as well. + +config JZ47XX_GPIO + bool "Ingenic JZ47xx GPIO driver" + depends on ARCH_JZ47XX + default y + help + Supports GPIO access on Ingenic JZ47xx SoCs. + endmenu diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 8939226..e562022 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -58,3 +58,4 @@ obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o obj-$(CONFIG_MSM_GPIO) += msm_gpio.o obj-$(CONFIG_$(SPL_)PCF8575_GPIO) += pcf8575_gpio.o obj-$(CONFIG_PM8916_GPIO) += pm8916_gpio.o +obj-$(CONFIG_JZ47XX_GPIO) += gpio-jz47xx.o diff --git a/drivers/gpio/gpio-jz47xx.c b/drivers/gpio/gpio-jz47xx.c new file mode 100644 index 0000000..210120d --- /dev/null +++ b/drivers/gpio/gpio-jz47xx.c @@ -0,0 +1,79 @@ +/* + * Ingenic JZ47xx GPIO + * + * Copyright (C) 2011 Marek Vasut + * on behalf of DENX Software Engineering GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +int gpio_get_value(unsigned gpio) +{ + void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; + int port = gpio / 32; + int pin = gpio % 32; + + return readl(gpio_regs + GPIO_PXPIN(port)) & BIT(pin); +} + +int gpio_set_value(unsigned gpio, int value) +{ + void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; + int port = gpio / 32; + int pin = gpio % 32; + + if (value) + writel(BIT(pin), gpio_regs + GPIO_PXPAT0S(port)); + else + writel(BIT(pin), gpio_regs + GPIO_PXPAT0C(port)); + + return 0; +} + +int gpio_direction_input(unsigned gpio) +{ + void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; + int port = gpio / 32; + int pin = gpio % 32; + + writel(BIT(pin), gpio_regs + GPIO_PXINTC(port)); + writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port)); + writel(BIT(pin), gpio_regs + GPIO_PXPAT1S(port)); + + return 0; +} + +int gpio_direction_output(unsigned gpio, int value) +{ + void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; + int port = gpio / 32; + int pin = gpio % 32; + + writel(BIT(pin), gpio_regs + GPIO_PXINTC(port)); + writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port)); + writel(BIT(pin), gpio_regs + GPIO_PXPAT1C(port)); + + gpio_set_value(gpio, value); + + return 0; +} + +int gpio_request(unsigned gpio, const char *label) +{ + int port = gpio / 32; + + if (port >= 6) + return -EINVAL; + + return 0; +} + +int gpio_free(unsigned gpio) +{ + return 0; +}