diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d7a9b11..142c445 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -579,6 +579,11 @@ config ARCH_SUNXI
 	select USB_KEYBOARD
 	select USE_TINY_PRINTF
 
+config TARGET_TS4600
+	bool "Support TS4600"
+	select CPU_ARM926EJS
+	select SUPPORT_SPL
+
 config TARGET_TS4800
 	bool "Support TS4800"
 	select CPU_V7
@@ -1015,6 +1020,7 @@ source "board/ti/ti816x/Kconfig"
 source "board/timll/devkit3250/Kconfig"
 source "board/toradex/colibri_pxa270/Kconfig"
 source "board/toradex/colibri_vf/Kconfig"
+source "board/technologic/ts4600/Kconfig"
 source "board/technologic/ts4800/Kconfig"
 source "board/vscom/baltos/Kconfig"
 source "board/woodburn/Kconfig"
diff --git a/board/technologic/ts4600/Kconfig b/board/technologic/ts4600/Kconfig
new file mode 100644
index 0000000..d0dc2e1
--- /dev/null
+++ b/board/technologic/ts4600/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_TS4600
+
+config SYS_BOARD
+	default "ts4600"
+
+config SYS_VENDOR
+	default "technologic"
+
+config SYS_SOC
+	default "mxs"
+
+config SYS_CONFIG_NAME
+	default "ts4600"
+
+endif
diff --git a/board/technologic/ts4600/MAINTAINERS b/board/technologic/ts4600/MAINTAINERS
new file mode 100644
index 0000000..6f683b5
--- /dev/null
+++ b/board/technologic/ts4600/MAINTAINERS
@@ -0,0 +1,6 @@
+TS4600 BOARD
+M:	Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
+S:	Maintained
+F:	board/technologic/ts4600/
+F:	include/configs/ts4600.h
+F:	configs/ts4600_defconfig
diff --git a/board/technologic/ts4600/Makefile b/board/technologic/ts4600/Makefile
new file mode 100644
index 0000000..faa2970
--- /dev/null
+++ b/board/technologic/ts4600/Makefile
@@ -0,0 +1,11 @@
+#
+# (C) Copyright 2016 Savoir-faire Linux
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+ifndef	CONFIG_SPL_BUILD
+obj-y	:= ts4600.o
+else
+obj-y	:= iomux.o
+endif
diff --git a/board/technologic/ts4600/iomux.c b/board/technologic/ts4600/iomux.c
new file mode 100644
index 0000000..1398bbe
--- /dev/null
+++ b/board/technologic/ts4600/iomux.c
@@ -0,0 +1,149 @@
+/*
+ * (C) Copyright 2016 Savoir-faire Linux Inc.
+ *
+ * Author: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
+ *
+ * Based on work from TS7680 code by:
+ *   Kris Bahnsen <kris@embeddedarm.com>
+ *   Mark Featherston <mark@embeddedarm.com>
+ *   https://github.com/embeddedarm/u-boot/tree/master/board/technologic/ts7680
+ *
+ * Derived from MX28EVK code by
+ *   Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <config.h>
+#include <asm/io.h>
+#include <asm/arch/iomux-mx28.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+#define	MUX_CONFIG_SSP0	(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
+#define	MUX_CONFIG_EMI	(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
+
+const iomux_cfg_t iomux_setup[] = {
+	/* DUART */
+	MX28_PAD_PWM0__DUART_RX,
+	MX28_PAD_PWM1__DUART_TX,
+
+	/* MMC0 */
+	MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0,
+	MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0,
+	MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0,
+	MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0,
+	MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0,
+	MX28_PAD_SSP0_SCK__SSP0_SCK |
+		(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
+
+	/* MMC0 slot power enable */
+	MX28_PAD_PWM3__GPIO_3_28 |
+		(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
+
+	/* EMI */
+	MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
+	MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
+
+	/* I2C */
+	MX28_PAD_I2C0_SCL__I2C0_SCL,
+	MX28_PAD_I2C0_SDA__I2C0_SDA,
+
+};
+
+#define HW_DRAM_CTL29	(0x74 >> 2)
+#define CS_MAP		0xf
+#define COLUMN_SIZE	0x2
+#define ADDR_PINS	0x1
+#define APREBIT		0xa
+
+#define HW_DRAM_CTL29_CONFIG	(CS_MAP << 24 | COLUMN_SIZE << 16 | \
+					ADDR_PINS << 8 | APREBIT)
+
+#define HW_DRAM_CTL39	(0x9c >> 2)
+#define TFAW		0xb
+#define TDLL		0xc8
+
+#define HW_DRAM_CTL39_CONFIG	(TFAW << 24 | TDLL)
+
+#define HW_DRAM_CTL41	(0xa4 >> 2)
+#define TPDEX		0x2
+#define TRCD_INT	0x4
+#define TRC		0xd
+
+#define HW_DRAM_CTL41_CONFIG	(TPDEX << 24 | TRCD_INT << 8 | TRC)
+
+#define HW_DRAM_CTL42	(0xa8 >> 2)
+#define TRAS_MAX	0x36a6
+#define TRAS_MIN	0xa
+
+#define HW_DRAM_CTL42_CONFIG  (TRAS_MAX << 8 | TRAS_MIN)
+
+#define HW_DRAM_CTL43	(0xac >> 2)
+#define TRP		0x4
+#define TRFC		0x27
+#define TREF		0x2a0
+
+#define HW_DRAM_CTL43_CONFIG (TRP << 24 | TRFC << 16 | TREF)
+
+void mxs_adjust_memory_params(uint32_t *dram_vals)
+{
+	dram_vals[HW_DRAM_CTL29] = HW_DRAM_CTL29_CONFIG;
+	dram_vals[HW_DRAM_CTL39] = HW_DRAM_CTL39_CONFIG;
+	dram_vals[HW_DRAM_CTL41] = HW_DRAM_CTL41_CONFIG;
+	dram_vals[HW_DRAM_CTL42] = HW_DRAM_CTL42_CONFIG;
+	dram_vals[HW_DRAM_CTL43] = HW_DRAM_CTL43_CONFIG;
+}
+
+void board_init_ll(const uint32_t arg, const uint32_t *resptr)
+{
+	mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
+}
diff --git a/board/technologic/ts4600/ts4600.c b/board/technologic/ts4600/ts4600.c
new file mode 100644
index 0000000..70dfead
--- /dev/null
+++ b/board/technologic/ts4600/ts4600.c
@@ -0,0 +1,89 @@
+/*
+ * (C) Copyright 2016 Savoir-faire Linux Inc.
+ *
+ * Author: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
+ *
+ * Based on work from TS7680 code by:
+ *   Kris Bahnsen <kris@embeddedarm.com>
+ *   Mark Featherston <mark@embeddedarm.com>
+ *   https://github.com/embeddedarm/u-boot/tree/master/board/technologic/ts7680
+ *
+ * Derived from MX28EVK code by
+ *   Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/iomux-mx28.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+#include <linux/mii.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_early_init_f(void)
+{
+	/* IO0 clock at 480MHz */
+	mxs_set_ioclk(MXC_IOCLK0, 480000);
+	/* IO1 clock at 480MHz */
+	mxs_set_ioclk(MXC_IOCLK1, 480000);
+
+	/* SSP0 clocks at 96MHz */
+	mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	return mxs_dram_init();
+}
+
+int board_init(void)
+{
+	/* Adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+	return 0;
+}
+
+#ifdef CONFIG_CMD_MMC
+static int ts4600_mmc_cd(int id)
+{
+	return 1;
+}
+
+int board_mmc_init(bd_t *bis)
+{
+	int ret;
+
+	mxs_iomux_setup_pad(MX28_PAD_PWM3__GPIO_3_28);
+
+	/* Power-on SD */
+	gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 1);
+	udelay(1000);
+	gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0);
+
+	/* SD card */
+	ret = mxsmmc_initialize(bis, 0, NULL, ts4600_mmc_cd);
+	if(ret != 0) {
+		printf("SD controller initialized with %d\n", ret);
+	}
+
+	return ret;
+}
+#endif
+
+int checkboard(void)
+{
+	puts("Board: TS4600\n");
+
+	return 0;
+}
diff --git a/configs/ts4600_defconfig b/configs/ts4600_defconfig
new file mode 100644
index 0000000..c052ded
--- /dev/null
+++ b/configs/ts4600_defconfig
@@ -0,0 +1,18 @@
+CONFIG_ARM=y
+CONFIG_TARGET_TS4600=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC"
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SPL=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_LIBFDT=y
diff --git a/include/configs/ts4600.h b/include/configs/ts4600.h
new file mode 100644
index 0000000..9b7bd1b
--- /dev/null
+++ b/include/configs/ts4600.h
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2016 Savoir-faire Linux Inc.
+ *
+ * Author: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
+ *
+ * Derived from MX28EVK code by
+ *   Fabio Estevam <fabio.estevam@freescale.com>
+ *   Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the TS4600 Board
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __CONFIGS_TS4600_H__
+#define __CONFIGS_TS4600_H__
+
+/* System configurations */
+#define CONFIG_MX28				/* i.MX28 SoC */
+
+/* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH			/* No NOR Flash */
+#define CONFIG_DOS_PARTITION
+
+/* Memory configuration */
+#define CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
+#define PHYS_SDRAM_1			0x40000000	/* Base address */
+#define PHYS_SDRAM_1_SIZE		0x40000000	/* Max 1 GB RAM */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+
+/* Environment */
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+/* Environment is in MMC */
+#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC)
+#define CONFIG_ENV_OFFSET		(256 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV		0
+#endif
+
+/* Boot Linux */
+#define CONFIG_LOADADDR		0x42000000
+#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
+
+/* Extra Environment */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"fdt_addr=0x41000000\0" \
+	"loadkernel=load mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage\0" \
+	"loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} imx28-ts4600.dtb\0" \
+	"loadbootscript=load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot.ub\0" \
+	"bootscript=echo Running bootscript from mmc...; " \
+		"setenv mmcdev 0; " \
+		"setenv mmcpart 2; " \
+		"run loadbootscript && source ${loadaddr}; \0" \
+	"sdboot=echo Booting from SD card ...; " \
+		"setenv mmcdev 0; " \
+		"setenv mmcpart 2; " \
+		"setenv root /dev/mmcblk0p3; " \
+		"run loadkernel && run loadfdt; \0" \
+	"startbootsequence=run bootscript || run sdboot \0" \
+
+#define CONFIG_BOOTCOMMAND \
+	"mmc rescan; " \
+	"run startbootsequence; " \
+	"setenv cmdline_append console=ttyAMA0,115200; " \
+	"setenv bootargs root=${root} rootwait rw ${cmdline_append}; " \
+	"bootz ${loadaddr} - ${fdt_addr}; "
+
+/* The rest of the configuration is shared */
+#include <configs/mxs.h>
+
+#endif /* __CONFIGS_TS4600_H__ */
