From patchwork Thu Oct 6 14:33:57 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antoine Tenart X-Patchwork-Id: 678953 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3sqZvH5YJZz9s8x for ; Fri, 7 Oct 2016 01:35:39 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1A05EA756F; Thu, 6 Oct 2016 16:35:23 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9DJ2BD6dyLa6; Thu, 6 Oct 2016 16:35:22 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BA9D0A75B4; Thu, 6 Oct 2016 16:35:15 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 91B34A752D for ; Thu, 6 Oct 2016 16:35:04 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fLmdnGRe6s5p for ; Thu, 6 Oct 2016 16:35:04 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.free-electrons.com (down.free-electrons.com [37.187.137.238]) by theia.denx.de (Postfix) with ESMTP id 12BA8A7548 for ; Thu, 6 Oct 2016 16:35:03 +0200 (CEST) Received: by mail.free-electrons.com (Postfix, from userid 110) id 73E17F0D; Thu, 6 Oct 2016 16:35:02 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 45864248; Thu, 6 Oct 2016 16:35:02 +0200 (CEST) From: Antoine Tenart To: hdegoede@redhat.com Date: Thu, 6 Oct 2016 16:33:57 +0200 Message-Id: <20161006143401.12012-6-antoine.tenart@free-electrons.com> X-Mailer: git-send-email 2.10.1 In-Reply-To: <20161006143401.12012-1-antoine.tenart@free-electrons.com> References: <20161006143401.12012-1-antoine.tenart@free-electrons.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v2 5/9] tegra: select ARM_GIC for Tegra TK1s X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Select the newly introduced ARM_GIC option to the relevant configuration which also have a psci implementation. Signed-off-by: Antoine Tenart --- arch/arm/mach-tegra/tegra124/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-tegra/tegra124/Kconfig b/arch/arm/mach-tegra/tegra124/Kconfig index df7746228386..41d75bd2f321 100644 --- a/arch/arm/mach-tegra/tegra124/Kconfig +++ b/arch/arm/mach-tegra/tegra124/Kconfig @@ -6,12 +6,14 @@ choice config TARGET_JETSON_TK1 bool "NVIDIA Tegra124 Jetson TK1 board" + select ARM_GIC select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI config TARGET_CEI_TK1_SOM bool "Colorado Engineering Inc Tegra124 TK1-som board" + select ARM_GIC select CPU_V7_HAS_NONSEC if !SPL_BUILD select CPU_V7_HAS_VIRT if !SPL_BUILD help