From patchwork Fri Sep 16 13:09:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 670872 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3sbG1N2tD4z9s2Q for ; Fri, 16 Sep 2016 23:13:12 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E9516A75CA; Fri, 16 Sep 2016 15:11:34 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bLDm51ICj1tA; Fri, 16 Sep 2016 15:11:34 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 37760A7600; Fri, 16 Sep 2016 15:11:00 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B0AD5A757B for ; Fri, 16 Sep 2016 15:10:49 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SSrRj7467NJ6 for ; Fri, 16 Sep 2016 15:10:49 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mx1.mailbox.org (mx1.mailbox.org [80.241.60.212]) by theia.denx.de (Postfix) with ESMTPS id D0A15A75B9 for ; Fri, 16 Sep 2016 15:10:31 +0200 (CEST) Received: from smtp1.mailbox.org (smtp1.mailbox.org [80.241.60.240]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.mailbox.org (Postfix) with ESMTPS id 767B943F6D; Fri, 16 Sep 2016 15:10:31 +0200 (CEST) X-Virus-Scanned: amavisd-new at heinlein-support.de Received: from smtp1.mailbox.org ([80.241.60.240]) by gerste.heinlein-support.de (gerste.heinlein-support.de [91.198.250.173]) (amavisd-new, port 10030) with ESMTP id fPzI-pl9zBG1; Fri, 16 Sep 2016 15:10:09 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Date: Fri, 16 Sep 2016 15:09:38 +0200 Message-Id: <20160916130947.11367-6-sr@denx.de> In-Reply-To: <20160916130947.11367-1-sr@denx.de> References: <20160916130947.11367-1-sr@denx.de> Cc: Marek Vasut , Hua Jing , Haim Boot , Hanna Hawa , Nadav Haklai , Victor Gu , Kostya Porotchkin , Terry Zhou , Wilson Ding Subject: [U-Boot] [PATCH 06/15] usb: ehci: ehci-marvell.c: Add Armada 3700 support (ARMv8) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch adds DM based support for the Armada 3700 EHCI controller. The address windows don't need to get configured in this case. The difference here is detected via DT compatible property at runtime. With this support and the DM xHCI driver, both XHCI and eHCI can be used simultaniously on the MVEBU boards now. Signed-off-by: Stefan Roese Cc: Nadav Haklai Cc: Kostya Porotchkin Cc: Wilson Ding Cc: Victor Gu Cc: Hua Jing Cc: Terry Zhou Cc: Hanna Hawa Cc: Haim Boot Cc: Marek Vasut Acked-by: Marek Vasut --- drivers/usb/host/ehci-marvell.c | 59 ++++++++++++++++++++++++++++++++++++----- 1 file changed, 52 insertions(+), 7 deletions(-) diff --git a/drivers/usb/host/ehci-marvell.c b/drivers/usb/host/ehci-marvell.c index 5b0f46a..72b9b30 100644 --- a/drivers/usb/host/ehci-marvell.c +++ b/drivers/usb/host/ehci-marvell.c @@ -26,6 +26,16 @@ DECLARE_GLOBAL_DATA_PTR; #define USB_WINDOW_BASE(i) (0x324 + ((i) << 4)) #define USB_TARGET_DRAM 0x0 +#define USB2_SBUSCFG_OFF 0x90 + +#define USB_SBUSCFG_BAWR_OFF 0x6 +#define USB_SBUSCFG_BARD_OFF 0x3 +#define USB_SBUSCFG_AHBBRST_OFF 0x0 + +#define USB_SBUSCFG_BAWR_ALIGN_64B 0x4 +#define USB_SBUSCFG_BARD_ALIGN_64B 0x4 +#define USB_SBUSCFG_AHBBRST_INCR16 0x7 + /* * USB 2.0 Bridge Address Decoding registers setup */ @@ -41,7 +51,7 @@ struct ehci_mvebu_priv { * to the common mvebu archticture including the mbus setup, this * will be the only function needed to configure the access windows */ -static void usb_brg_adrdec_setup(u32 base) +static void usb_brg_adrdec_setup(void *base) { const struct mbus_dram_target_info *dram; int i; @@ -66,6 +76,29 @@ static void usb_brg_adrdec_setup(u32 base) } } +static void marvell_ehci_powerup_fixup(struct ehci_ctrl *ctrl, + uint32_t *status_reg, uint32_t *reg) +{ + struct ehci_mvebu_priv *priv = ctrl->priv; + + /* + * Set default value for reg SBUSCFG, which is Control for the AMBA + * system bus interface: + * BAWR = BARD = 4 : Align rd/wr bursts packets larger than 64 bytes + * AHBBRST = 7 : Align AHB burst for packets larger than 64 bytes + */ + writel((USB_SBUSCFG_BAWR_ALIGN_64B << USB_SBUSCFG_BAWR_OFF) | + (USB_SBUSCFG_BARD_ALIGN_64B << USB_SBUSCFG_BARD_OFF) | + (USB_SBUSCFG_AHBBRST_INCR16 << USB_SBUSCFG_AHBBRST_OFF), + priv->hcd_base + USB2_SBUSCFG_OFF); + + mdelay(50); +} + +static struct ehci_ops marvell_ehci_ops = { + .powerup_fixup = NULL, +}; + static int ehci_mvebu_probe(struct udevice *dev) { struct ehci_mvebu_priv *priv = dev_get_priv(dev); @@ -81,17 +114,28 @@ static int ehci_mvebu_probe(struct udevice *dev) return -ENXIO; } - usb_brg_adrdec_setup(priv->hcd_base); + /* + * For SoCs without hlock like Armada3700 we need to program the sbuscfg + * reg to guarantee AHB master's burst will not overrun or underrun + * the FIFO. Otherwise all USB2 write option will fail. + * Also, the address decoder doesn't need to get setup with this + * SoC, so don't call usb_brg_adrdec_setup(). + */ + if (of_device_is_compatible(dev, "marvell,armada3700-ehci")) + marvell_ehci_ops.powerup_fixup = marvell_ehci_powerup_fixup; + else + usb_brg_adrdec_setup((void *)priv->hcd_base); hccr = (struct ehci_hccr *)(priv->hcd_base + 0x100); hcor = (struct ehci_hcor *) - ((u32)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + ((uintptr_t)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); - debug("ehci-marvell: init hccr %x and hcor %x hc_length %d\n", - (u32)hccr, (u32)hcor, - (u32)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + debug("ehci-marvell: init hccr %lx and hcor %lx hc_length %ld\n", + (uintptr_t)hccr, (uintptr_t)hcor, + (uintptr_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); - return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST); + return ehci_register(dev, hccr, hcor, &marvell_ehci_ops, 0, + USB_INIT_HOST); } static int ehci_mvebu_remove(struct udevice *dev) @@ -107,6 +151,7 @@ static int ehci_mvebu_remove(struct udevice *dev) static const struct udevice_id ehci_usb_ids[] = { { .compatible = "marvell,orion-ehci", }, + { .compatible = "marvell,armada3700-ehci", }, { } };