From patchwork Thu Sep 8 06:47:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Burton X-Patchwork-Id: 667503 X-Patchwork-Delegate: daniel.schwierzeck@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3sVJ1H75mkz9rxm for ; Thu, 8 Sep 2016 21:25:55 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 291A0A7644; Thu, 8 Sep 2016 13:24:54 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bCrv1HPSSzSz; Thu, 8 Sep 2016 13:24:53 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0B0ACA7651; Thu, 8 Sep 2016 13:24:04 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 87A4CA7640 for ; Thu, 8 Sep 2016 08:50:29 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id M1kjcXuXtUF7 for ; Thu, 8 Sep 2016 08:50:29 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailapp01.imgtec.com (mailapp01.imgtec.com [195.59.15.196]) by theia.denx.de (Postfix) with ESMTP id 13E41A763F for ; Thu, 8 Sep 2016 08:50:27 +0200 (CEST) Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Forcepoint Email with ESMTPS id B6A458B79147A; Thu, 8 Sep 2016 07:50:13 +0100 (IST) Received: from localhost (10.100.200.230) by HHMAIL01.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server (TLS) id 14.3.294.0; Thu, 8 Sep 2016 07:50:15 +0100 From: Paul Burton To: , Daniel Schwierzeck Date: Thu, 8 Sep 2016 07:47:35 +0100 Message-ID: <20160908064739.25313-9-paul.burton@imgtec.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20160908064739.25313-1-paul.burton@imgtec.com> References: <20160908064739.25313-1-paul.burton@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [10.100.200.230] Subject: [U-Boot] [PATCH v7 08/12] dm: regmap: Implement simple regmap_read & regmap_write X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The regmap_read & regmap_write functions were previously declared in regmap.h but not implemented anywhere. The regmap implementation & commit message of 6f98b7504f70 ("dm: Add support for register maps (regmap)") indicate that only memory mapped accesses are supported for now, so providing simple implementations of regmap_read & regmap_write is trivial. The access size is presumed to be 4 bytes & endianness is presumed native, which are the defaults for the regmap code in Linux. Signed-off-by: Paul Burton Reviewed-by: Simon Glass --- Changes in v7: - Use map_physmem instead of ioremap, as it's more generic - Use plain readl & writel, not __raw_ variants Changes in v6: None Changes in v5: None Changes in v4: - Tweak whitespace Changes in v3: None Changes in v2: - New patch drivers/core/regmap.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c index 0299ff0..c68bcba 100644 --- a/drivers/core/regmap.c +++ b/drivers/core/regmap.c @@ -13,6 +13,8 @@ #include #include +#include + DECLARE_GLOBAL_DATA_PTR; static struct regmap *regmap_alloc_count(int count) @@ -117,3 +119,21 @@ int regmap_uninit(struct regmap *map) return 0; } + +int regmap_read(struct regmap *map, uint offset, uint *valp) +{ + uint32_t *ptr = map_physmem(map->base + offset, 4, MAP_NOCACHE); + + *valp = le32_to_cpu(readl(ptr)); + + return 0; +} + +int regmap_write(struct regmap *map, uint offset, uint val) +{ + uint32_t *ptr = map_physmem(map->base + offset, 4, MAP_NOCACHE); + + writel(cpu_to_le32(val), ptr); + + return 0; +}