From patchwork Fri Sep 23 14:29:15 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 116094 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 42273B6F72 for ; Sat, 24 Sep 2011 00:30:43 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6FAC928601; Fri, 23 Sep 2011 16:30:40 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rHQmQO0dn9Qd; Fri, 23 Sep 2011 16:30:40 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0F4EE285ED; Fri, 23 Sep 2011 16:30:38 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 08A91285ED for ; Fri, 23 Sep 2011 16:30:36 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5SWKru-91e8J for ; Fri, 23 Sep 2011 16:30:35 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.dev.rtsoft.ru (mail.dev.rtsoft.ru [213.79.90.226]) by theia.denx.de (Postfix) with SMTP id 12B16285EC for ; Fri, 23 Sep 2011 16:30:33 +0200 (CEST) Received: (qmail 24681 invoked from network); 23 Sep 2011 14:30:37 -0000 Received: from unknown (HELO wasted.dev.rtsoft.ru) (192.168.1.70) by 0 with SMTP; 23 Sep 2011 14:30:37 -0000 From: Sergei Shtylyov Organization: MontaVista Software Inc. To: u-boot@lists.denx.de Date: Fri, 23 Sep 2011 18:29:15 +0400 User-Agent: KMail/1.9.10 References: <201109161854.38893.sshtylyov@ru.mvista.com> <201109161858.08706.sshtylyov@ru.mvista.com> In-Reply-To: <201109161858.08706.sshtylyov@ru.mvista.com> MIME-Version: 1.0 Content-Disposition: inline Message-Id: <201109231829.15371.sshtylyov@ru.mvista.com> Subject: Re: [U-Boot] [PATCH v3] DaVinci: correct MDSTAT.STATE mask X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de MDSTAT.STATE occupies bits 0..5 according to all available documentation, so fix the mask which previously was leaving out the intermediate state indicator bit. While at it, introduce two #define's for that mask -- unfortunately, we can't use a single #define as the assembly code can't include due to C-specfic constructs in it. Signed-off-by: Sergei Shtylyov --- arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S | 8 +++++--- arch/arm/cpu/arm926ejs/davinci/psc.c | 4 ++-- arch/arm/include/asm/arch-davinci/hardware.h | 2 ++ 3 files changed, 9 insertions(+), 5 deletions(-) Index: u-boot/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S =================================================================== --- u-boot.orig/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S +++ u-boot/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S @@ -45,6 +45,8 @@ #include +#define MDSTAT_STATE 0x3f + .globl lowlevel_init lowlevel_init: @@ -268,7 +270,7 @@ checkStatClkStop: checkDDRStatClkStop: ldr r6, MDSTAT_DDR2 ldr r7, [r6] - and r7, r7, $0x1f + and r7, r7, $MDSTAT_STATE cmp r7, $0x03 bne checkDDRStatClkStop @@ -343,7 +345,7 @@ checkStatClkStop2: checkDDRStatClkStop2: ldr r6, MDSTAT_DDR2 ldr r7, [r6] - and r7, r7, $0x1f + and r7, r7, $MDSTAT_STATE cmp r7, $0x01 bne checkDDRStatClkStop2 @@ -374,7 +376,7 @@ checkStatClkEn2: checkDDRStatClkEn2: ldr r6, MDSTAT_DDR2 ldr r7, [r6] - and r7, r7, $0x1f + and r7, r7, $MDSTAT_STATE cmp r7, $0x03 bne checkDDRStatClkEn2 Index: u-boot/arch/arm/cpu/arm926ejs/davinci/psc.c =================================================================== --- u-boot.orig/arch/arm/cpu/arm926ejs/davinci/psc.c +++ u-boot/arch/arm/cpu/arm926ejs/davinci/psc.c @@ -83,7 +83,7 @@ void lpsc_on(unsigned int id) while (readl(ptstat) & 0x01) continue; - if ((readl(mdstat) & 0x1f) == 0x03) + if ((readl(mdstat) & PSC_MDSTAT_STATE) == 0x03) return; /* Already on and enabled */ writel(readl(mdctl) | 0x03, mdctl); @@ -114,7 +114,7 @@ void lpsc_on(unsigned int id) while (readl(ptstat) & 0x01) continue; - while ((readl(mdstat) & 0x1f) != 0x03) + while ((readl(mdstat) & PSC_MDSTAT_STATE) != 0x03) continue; } Index: u-boot/arch/arm/include/asm/arch-davinci/hardware.h =================================================================== --- u-boot.orig/arch/arm/include/asm/arch-davinci/hardware.h +++ u-boot/arch/arm/include/asm/arch-davinci/hardware.h @@ -347,6 +347,8 @@ struct davinci_psc_regs { #endif /* CONFIG_SOC_DA8XX */ +#define PSC_MDSTAT_STATE 0x3f + #ifndef CONFIG_SOC_DA8XX /* Miscellania... */