diff mbox series

mmc: zynq_sdhci: Fix timing macros for MMC High speed

Message ID 1656319965-12124-1-git-send-email-ashok.reddy.soma@xilinx.com
State Accepted
Commit 71f07731488e9ade674ee396208317ab2db3cce1
Delegated to: Michal Simek
Headers show
Series mmc: zynq_sdhci: Fix timing macros for MMC High speed | expand

Commit Message

Ashok Reddy Soma June 27, 2022, 8:52 a.m. UTC
Timing macro's are wrong for MMC_HS_52 and MMC_DDR_52. Fix it with
correct values of MMC_TIMING_MMC_HS and MMC_TIMING_MMC_DDR52 respectively.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
---

 drivers/mmc/zynq_sdhci.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Michal Simek June 29, 2022, 11:43 a.m. UTC | #1
On 6/27/22 10:52, Ashok Reddy Soma wrote:
> Timing macro's are wrong for MMC_HS_52 and MMC_DDR_52. Fix it with
> correct values of MMC_TIMING_MMC_HS and MMC_TIMING_MMC_DDR52 respectively.
> 
> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
> ---
> 
>   drivers/mmc/zynq_sdhci.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
> index e978b67988..8f4071c8c2 100644
> --- a/drivers/mmc/zynq_sdhci.c
> +++ b/drivers/mmc/zynq_sdhci.c
> @@ -101,8 +101,8 @@ static const u8 mode2timing[] = {
>   	[MMC_LEGACY] = MMC_TIMING_LEGACY,
>   	[MMC_HS] = MMC_TIMING_MMC_HS,
>   	[SD_HS] = MMC_TIMING_SD_HS,
> -	[MMC_HS_52] = MMC_TIMING_UHS_SDR50,
> -	[MMC_DDR_52] = MMC_TIMING_UHS_DDR50,
> +	[MMC_HS_52] = MMC_TIMING_MMC_HS,
> +	[MMC_DDR_52] = MMC_TIMING_MMC_DDR52,
>   	[UHS_SDR12] = MMC_TIMING_UHS_SDR12,
>   	[UHS_SDR25] = MMC_TIMING_UHS_SDR25,
>   	[UHS_SDR50] = MMC_TIMING_UHS_SDR50,

Applied.
M
diff mbox series

Patch

diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index e978b67988..8f4071c8c2 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -101,8 +101,8 @@  static const u8 mode2timing[] = {
 	[MMC_LEGACY] = MMC_TIMING_LEGACY,
 	[MMC_HS] = MMC_TIMING_MMC_HS,
 	[SD_HS] = MMC_TIMING_SD_HS,
-	[MMC_HS_52] = MMC_TIMING_UHS_SDR50,
-	[MMC_DDR_52] = MMC_TIMING_UHS_DDR50,
+	[MMC_HS_52] = MMC_TIMING_MMC_HS,
+	[MMC_DDR_52] = MMC_TIMING_MMC_DDR52,
 	[UHS_SDR12] = MMC_TIMING_UHS_SDR12,
 	[UHS_SDR25] = MMC_TIMING_UHS_SDR25,
 	[UHS_SDR50] = MMC_TIMING_UHS_SDR50,