diff mbox series

[v2] mmc: mtk-sd: increase the minimum bus frequency

Message ID 1614914658-29162-1-git-send-email-weijie.gao@mediatek.com
State New
Delegated to: Peng Fan
Headers show
Series [v2] mmc: mtk-sd: increase the minimum bus frequency | expand

Commit Message

Weijie Gao March 5, 2021, 3:24 a.m. UTC
With a 48MHz input clock, the lowest bus frequency can be as low as
48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause
the mmc framework take seconds to finish the initialization.

Limiting the minimum bus frequency to a slightly higher value can solve the
issue without any side effects.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
 drivers/mmc/mtk-sd.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Jaehoon Chung March 5, 2021, 8:47 a.m. UTC | #1
On 3/5/21 12:24 PM, Weijie Gao wrote:
> With a 48MHz input clock, the lowest bus frequency can be as low as
> 48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause
> the mmc framework take seconds to finish the initialization.
> 
> Limiting the minimum bus frequency to a slightly higher value can solve the
> issue without any side effects.
> 
> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

Best Regards,
Jaehoon Chung

> ---
>  drivers/mmc/mtk-sd.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c
> index 3b9c122..626a4d3 100644
> --- a/drivers/mmc/mtk-sd.c
> +++ b/drivers/mmc/mtk-sd.c
> @@ -232,6 +232,8 @@
>  
>  #define SCLK_CYCLES_SHIFT		20
>  
> +#define MIN_BUS_CLK			200000
> +
>  #define CMD_INTS_MASK	\
>  	(MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO)
>  
> @@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice *dev)
>  	else
>  		cfg->f_min = host->src_clk_freq / (4 * 4095);
>  
> +	if (cfg->f_min < MIN_BUS_CLK)
> +		cfg->f_min = MIN_BUS_CLK;
> +
>  	cfg->f_max = host->src_clk_freq;
>  
>  	cfg->b_max = 1024;
>
Peng Fan (OSS) April 6, 2021, 9:40 a.m. UTC | #2
> Subject: [PATCH v2] mmc: mtk-sd: increase the minimum bus frequency

Could you please rebase? I am not able to apply this patch.

Thanks,
Peng.

> 
> With a 48MHz input clock, the lowest bus frequency can be as low as
> 48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause
> the mmc framework take seconds to finish the initialization.
> 
> Limiting the minimum bus frequency to a slightly higher value can solve the
> issue without any side effects.
> 
> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
> ---
>  drivers/mmc/mtk-sd.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index
> 3b9c122..626a4d3 100644
> --- a/drivers/mmc/mtk-sd.c
> +++ b/drivers/mmc/mtk-sd.c
> @@ -232,6 +232,8 @@
> 
>  #define SCLK_CYCLES_SHIFT		20
> 
> +#define MIN_BUS_CLK			200000
> +
>  #define CMD_INTS_MASK	\
>  	(MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR |
> MSDC_INT_CMDTMO)
> 
> @@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice *dev)
>  	else
>  		cfg->f_min = host->src_clk_freq / (4 * 4095);
> 
> +	if (cfg->f_min < MIN_BUS_CLK)
> +		cfg->f_min = MIN_BUS_CLK;
> +
>  	cfg->f_max = host->src_clk_freq;
> 
>  	cfg->b_max = 1024;
> --
> 1.9.1
diff mbox series

Patch

diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c
index 3b9c122..626a4d3 100644
--- a/drivers/mmc/mtk-sd.c
+++ b/drivers/mmc/mtk-sd.c
@@ -232,6 +232,8 @@ 
 
 #define SCLK_CYCLES_SHIFT		20
 
+#define MIN_BUS_CLK			200000
+
 #define CMD_INTS_MASK	\
 	(MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO)
 
@@ -1639,6 +1641,9 @@  static int msdc_drv_probe(struct udevice *dev)
 	else
 		cfg->f_min = host->src_clk_freq / (4 * 4095);
 
+	if (cfg->f_min < MIN_BUS_CLK)
+		cfg->f_min = MIN_BUS_CLK;
+
 	cfg->f_max = host->src_clk_freq;
 
 	cfg->b_max = 1024;