diff mbox series

mips: mt7628: fix the displayed DDR type of mt7628

Message ID 1614914007-28807-1-git-send-email-weijie.gao@mediatek.com
State New
Delegated to: Daniel Schwierzeck
Headers show
Series mips: mt7628: fix the displayed DDR type of mt7628 | expand

Commit Message

Weijie Gao March 5, 2021, 3:13 a.m. UTC
The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type
from bootstrap register must be ignored, and always be assumed as DDR1.

This patch fixes the displayed DDR type of mt7628.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
 arch/mips/mach-mtmips/mt7628/init.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Stefan Roese March 5, 2021, 6:22 a.m. UTC | #1
On 05.03.21 04:13, Weijie Gao wrote:
> The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type
> from bootstrap register must be ignored, and always be assumed as DDR1.
> 
> This patch fixes the displayed DDR type of mt7628.
> 
> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan
diff mbox series

Patch

diff --git a/arch/mips/mach-mtmips/mt7628/init.c b/arch/mips/mach-mtmips/mt7628/init.c
index 7c531ff686..6b535129df 100644
--- a/arch/mips/mach-mtmips/mt7628/init.c
+++ b/arch/mips/mach-mtmips/mt7628/init.c
@@ -68,6 +68,9 @@  int print_cpuinfo(void)
 	val = readl(sysc + SYSCTL_EFUSE_CFG_REG);
 	ee = val & EFUSE_MT7688;
 
+	if (pkg == PKG_ID_KN)
+		ddr = DRAM_DDR1;
+
 	printf("CPU:   MediaTek MT%u%c ver:%u eco:%u\n",
 	       ee ? 7688 : 7628, pkg ? 'A' : 'K', ver, eco);