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Fri, 16 Oct 2020 15:36:13 +0800 Received: from mcddlt001.mediatek.inc (10.19.240.15) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 16 Oct 2020 15:36:13 +0800 From: Weijie Gao To: CC: GSS_MTK_Uboot_upstream , Daniel Schwierzeck , Stefan Roese , Stefan Roese , Stefan Roese , Weijie Gao Subject: [PATCH 10/18] reset: mtmips: add reset controller support for MediaTek MT7620 SoC Date: Fri, 16 Oct 2020 15:36:12 +0800 Message-ID: <1602833772-19450-1-git-send-email-weijie.gao@mediatek.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-TM-SNTS-SMTP: AB608672044D641525059FFF8F1E786649803EFE8CBEF2FADF45E5A2C632569B2000:8 X-MTK: N X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean This patch adds reset controller bits definition header file for MediaTek MT7620 SoC Signed-off-by: Weijie Gao --- include/dt-bindings/reset/mt7620-reset.h | 35 ++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 include/dt-bindings/reset/mt7620-reset.h diff --git a/include/dt-bindings/reset/mt7620-reset.h b/include/dt-bindings/reset/mt7620-reset.h new file mode 100644 index 0000000000..3096b29cdb --- /dev/null +++ b/include/dt-bindings/reset/mt7620-reset.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao + */ + +#ifndef _DT_BINDINGS_MT7620_RESET_H_ +#define _DT_BINDINGS_MT7620_RESET_H_ + +#define PPE_RST 31 +#define SDHC_RST 30 +#define MIPS_CNT_RST 28 +#define PCIE_RST 26 +#define UHST_RST 25 +#define EPHY_RST 24 +#define ESW_RST 23 +#define UDEV_RST 22 +#define FE_RST 21 +#define WLAN_RST 20 +#define UARTL_RST 19 +#define SPI_RST 18 +#define I2S_RST 17 +#define I2C_RST 16 +#define NAND_RST 15 +#define DMA_RST 14 +#define PIO_RST 13 +#define UARTF_RST 12 +#define PCM_RST 11 +#define MC_RST 10 +#define INTC_RST 9 +#define TIMER_RST 8 +#define SYS_RST 0 + +#endif /* _DT_BINDINGS_MT7620_RESET_H_ */