| Message ID | 1595225195-23197-1-git-send-email-bmeng.cn@gmail.com |
|---|---|
| State | Accepted |
| Commit | 142dd57c5d971d3291e8896b5ecd7e878f97e1f1 |
| Delegated to: | Andes |
| Headers | show |
| Series | [v2,1/2] riscv: dts: hifive-unleashed-a00: Make memory node available to SPL | expand |
>-----Original Message----- >From: Bin Meng <bmeng.cn@gmail.com> >Sent: 20 July 2020 11:37 >To: Rick Chen <rick@andestech.com>; Pragnesh Patel ><pragnesh.patel@sifive.com>; Sagar Kadam <sagar.kadam@sifive.com>; U- >Boot Mailing List <u-boot@lists.denx.de> >Cc: Bin Meng <bin.meng@windriver.com> >Subject: [PATCH v2 1/2] riscv: dts: hifive-unleashed-a00: Make memory node >available to SPL > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >From: Bin Meng <bin.meng@windriver.com> > >Make memory node available to SPL in prepration to updates to SiFive DDR >RAM driver to read memory information from DT. > >Signed-off-by: Bin Meng <bin.meng@windriver.com> >--- > >Changes in v2: >- rebase on top of u-boot-riscv/master > > arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi index 7d838bf..5d0c928 100644 --- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi @@ -20,6 +20,10 @@ u-boot,spl-payload-offset = <0x105000>; /* loader2 @1044KB */ }; + memory@80000000 { + u-boot,dm-spl; + }; + hfclk { u-boot,dm-spl; };