| Message ID | 1590108508-10563-2-git-send-email-alex.nemirovsky@cortina-access.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
| Series | [v8,1/2] spi: ca_sflash: Add CAxxxx SPI Flash Controller | expand |
On Fri, May 22, 2020 at 6:18 AM Alex Nemirovsky <alex.nemirovsky@cortina-access.com> wrote: > > Add SPI NOR support for Cortina Access > Presidio Engineering Board > > Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> > CC: Jagan Teki <jagan@amarulasolutions.com> > CC: Vignesh R <vigneshr@ti.com> > CC: Tom Rini <trini@konsulko.com> > > --- > > Changes in v8: None > Changes in v7: None > Changes in v5: > - NAND support removed from presidio-asic board DT. > > Changes in v3: None > > arch/arm/dts/ca-presidio-engboard.dts | 6 +-- > board/cortina/presidio-asic/presidio.c | 16 ++++++- > configs/cortina_presidio-asic-spi-nand_defconfig | 48 +++++++++++++++++++ > configs/cortina_presidio-asic-spi-nor_defconfig | 59 ++++++++++++++++++++++++ > 4 files changed, 124 insertions(+), 5 deletions(-) > create mode 100644 configs/cortina_presidio-asic-spi-nand_defconfig > create mode 100644 configs/cortina_presidio-asic-spi-nor_defconfig > > diff --git a/arch/arm/dts/ca-presidio-engboard.dts b/arch/arm/dts/ca-presidio-engboard.dts > index c03dacc..34148b9 100644 > --- a/arch/arm/dts/ca-presidio-engboard.dts > +++ b/arch/arm/dts/ca-presidio-engboard.dts > @@ -55,15 +55,13 @@ > }; > > sflash: sflash-controller@f4324000 { > - #address-cells = <2>; > - #size-cells = <1>; > compatible = "cortina,ca-sflash"; > reg = <0x0 0xf4324000 0x50>; > reg-names = "sflash-regs"; > flash@0 { > compatible = "jedec,spi-nor"; > - spi-rx-bus-width = <1>; > - spi-max-frequency = <108000000>; > + spi-rx-bus-width = <4>; > + spi-tx-bus-width = <4>; Unrelated change, please prepare separate patch. > }; > }; > }; > diff --git a/board/cortina/presidio-asic/presidio.c b/board/cortina/presidio-asic/presidio.c > index 3c132f1..883bd2e 100644 > --- a/board/cortina/presidio-asic/presidio.c > +++ b/board/cortina/presidio-asic/presidio.c > @@ -16,7 +16,7 @@ > #include <asm/psci.h> > #include <cpu_func.h> > #include <asm/armv8/mmu.h> > - > +#include <dm/uclass.h> > DECLARE_GLOBAL_DATA_PTR; > > #define CA_PERIPH_BASE 0xE0000000UL > @@ -72,9 +72,23 @@ static noinline int invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1, > return function_id; > } > > +#ifdef CONFIG_CORTINA_SFLASH > +static int init_sflash(void) > +{ > + struct udevice *dev; > + > + uclass_first_device(UCLASS_SPI, &dev); I was wondering why SPI here is probing separately, we have sf to probe at run time?
> On Jun 1, 2020, at 9:48 AM, Jagan Teki <jagan@amarulasolutions.com> wrote: > > On Fri, May 22, 2020 at 6:18 AM Alex Nemirovsky > <alex.nemirovsky@cortina-access.com> wrote: >> >> Add SPI NOR support for Cortina Access >> Presidio Engineering Board >> >> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> >> CC: Jagan Teki <jagan@amarulasolutions.com> >> CC: Vignesh R <vigneshr@ti.com> >> CC: Tom Rini <trini@konsulko.com> >> >> --- >> >> Changes in v8: None >> Changes in v7: None >> Changes in v5: >> - NAND support removed from presidio-asic board DT. >> >> Changes in v3: None >> >> arch/arm/dts/ca-presidio-engboard.dts | 6 +-- >> board/cortina/presidio-asic/presidio.c | 16 ++++++- >> configs/cortina_presidio-asic-spi-nand_defconfig | 48 +++++++++++++++++++ >> configs/cortina_presidio-asic-spi-nor_defconfig | 59 ++++++++++++++++++++++++ >> 4 files changed, 124 insertions(+), 5 deletions(-) >> create mode 100644 configs/cortina_presidio-asic-spi-nand_defconfig >> create mode 100644 configs/cortina_presidio-asic-spi-nor_defconfig >> >> diff --git a/arch/arm/dts/ca-presidio-engboard.dts b/arch/arm/dts/ca-presidio-engboard.dts >> index c03dacc..34148b9 100644 >> --- a/arch/arm/dts/ca-presidio-engboard.dts >> +++ b/arch/arm/dts/ca-presidio-engboard.dts >> @@ -55,15 +55,13 @@ >> }; >> >> sflash: sflash-controller@f4324000 { >> - #address-cells = <2>; >> - #size-cells = <1>; >> compatible = "cortina,ca-sflash"; >> reg = <0x0 0xf4324000 0x50>; >> reg-names = "sflash-regs"; >> flash@0 { >> compatible = "jedec,spi-nor"; >> - spi-rx-bus-width = <1>; >> - spi-max-frequency = <108000000>; >> + spi-rx-bus-width = <4>; >> + spi-tx-bus-width = <4>; > > Unrelated change, please prepare separate patch. SPI flash driver is bundled with a board specific integration file. Since the SPI flash driver has yet to be accepted upstream the previous board support DT for SPI-flash had no effect. Therefore this change should not break anything as SPI flash driver has yet to be active upstream. > >> }; >> }; >> }; >> diff --git a/board/cortina/presidio-asic/presidio.c b/board/cortina/presidio-asic/presidio.c >> index 3c132f1..883bd2e 100644 >> --- a/board/cortina/presidio-asic/presidio.c >> +++ b/board/cortina/presidio-asic/presidio.c >> @@ -16,7 +16,7 @@ >> #include <asm/psci.h> >> #include <cpu_func.h> >> #include <asm/armv8/mmu.h> >> - >> +#include <dm/uclass.h> >> DECLARE_GLOBAL_DATA_PTR; >> >> #define CA_PERIPH_BASE 0xE0000000UL >> @@ -72,9 +72,23 @@ static noinline int invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1, >> return function_id; >> } >> >> +#ifdef CONFIG_CORTINA_SFLASH >> +static int init_sflash(void) >> +{ >> + struct udevice *dev; >> + >> + uclass_first_device(UCLASS_SPI, &dev); > > I was wondering why SPI here is probing separately, we have sf to > probe at run time? Pengpeng, please review and respond to this question.
diff --git a/arch/arm/dts/ca-presidio-engboard.dts b/arch/arm/dts/ca-presidio-engboard.dts index c03dacc..34148b9 100644 --- a/arch/arm/dts/ca-presidio-engboard.dts +++ b/arch/arm/dts/ca-presidio-engboard.dts @@ -55,15 +55,13 @@ }; sflash: sflash-controller@f4324000 { - #address-cells = <2>; - #size-cells = <1>; compatible = "cortina,ca-sflash"; reg = <0x0 0xf4324000 0x50>; reg-names = "sflash-regs"; flash@0 { compatible = "jedec,spi-nor"; - spi-rx-bus-width = <1>; - spi-max-frequency = <108000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; }; }; }; diff --git a/board/cortina/presidio-asic/presidio.c b/board/cortina/presidio-asic/presidio.c index 3c132f1..883bd2e 100644 --- a/board/cortina/presidio-asic/presidio.c +++ b/board/cortina/presidio-asic/presidio.c @@ -16,7 +16,7 @@ #include <asm/psci.h> #include <cpu_func.h> #include <asm/armv8/mmu.h> - +#include <dm/uclass.h> DECLARE_GLOBAL_DATA_PTR; #define CA_PERIPH_BASE 0xE0000000UL @@ -72,9 +72,23 @@ static noinline int invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1, return function_id; } +#ifdef CONFIG_CORTINA_SFLASH +static int init_sflash(void) +{ + struct udevice *dev; + + uclass_first_device(UCLASS_SPI, &dev); + + return 0; +} +#endif + int board_early_init_r(void) { dcache_disable(); +#ifdef CONFIG_CORTINA_SFLASH + init_sflash(); +#endif return 0; } diff --git a/configs/cortina_presidio-asic-spi-nand_defconfig b/configs/cortina_presidio-asic-spi-nand_defconfig new file mode 100644 index 0000000..515ad22 --- /dev/null +++ b/configs/cortina_presidio-asic-spi-nand_defconfig @@ -0,0 +1,48 @@ +CONFIG_ARM=y +# CONFIG_SYS_ARCH_TIMER is not set +CONFIG_TARGET_PRESIDIO_ASIC=y +CONFIG_SYS_TEXT_BASE=0x04000000 +CONFIG_ENV_SIZE=0x20000 +CONFIG_DM_GPIO=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_IDENT_STRING="Presidio-SoC" +CONFIG_SHOW_BOOT_PROGRESS=y +CONFIG_BOOTDELAY=3 +CONFIG_LOGLEVEL=7 +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SYS_PROMPT="G3#" +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PART=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y +CONFIG_CMD_WDT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_SMC=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_MTDPARTS=y +CONFIG_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" +# CONFIG_NET is not set +CONFIG_DM=y +CONFIG_CORTINA_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_CA=y +CONFIG_DM_MMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_CORTINA=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_SPI_NAND=y +CONFIG_DM_SPI_FLASH=y +CONFIG_DM_SERIAL=y +CONFIG_CORTINA_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CORTINA_SFLASH=y +CONFIG_WDT=y +CONFIG_WDT_CORTINA=y diff --git a/configs/cortina_presidio-asic-spi-nor_defconfig b/configs/cortina_presidio-asic-spi-nor_defconfig new file mode 100644 index 0000000..d7ecec3 --- /dev/null +++ b/configs/cortina_presidio-asic-spi-nor_defconfig @@ -0,0 +1,59 @@ +CONFIG_ARM=y +# CONFIG_SYS_ARCH_TIMER is not set +CONFIG_TARGET_PRESIDIO_ASIC=y +CONFIG_SYS_TEXT_BASE=0x04000000 +CONFIG_ENV_SIZE=0x20000 +CONFIG_DM_GPIO=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_IDENT_STRING="Presidio-SoC" +CONFIG_SHOW_BOOT_PROGRESS=y +CONFIG_BOOTDELAY=3 +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SYS_PROMPT="G3#" +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PART=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y +CONFIG_CMD_WDT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_SMC=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_MTDPARTS=y +CONFIG_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" +# CONFIG_NET is not set +CONFIG_DM=y +CONFIG_CORTINA_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_CA=y +CONFIG_LED=y +CONFIG_LED_CORTINA=y +CONFIG_DM_MMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_CORTINA=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_XMC=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_DM_SERIAL=y +CONFIG_CORTINA_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CORTINA_SFLASH=y +CONFIG_WDT=y +CONFIG_WDT_CORTINA=y
Add SPI NOR support for Cortina Access Presidio Engineering Board Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Vignesh R <vigneshr@ti.com> CC: Tom Rini <trini@konsulko.com> --- Changes in v8: None Changes in v7: None Changes in v5: - NAND support removed from presidio-asic board DT. Changes in v3: None arch/arm/dts/ca-presidio-engboard.dts | 6 +-- board/cortina/presidio-asic/presidio.c | 16 ++++++- configs/cortina_presidio-asic-spi-nand_defconfig | 48 +++++++++++++++++++ configs/cortina_presidio-asic-spi-nor_defconfig | 59 ++++++++++++++++++++++++ 4 files changed, 124 insertions(+), 5 deletions(-) create mode 100644 configs/cortina_presidio-asic-spi-nand_defconfig create mode 100644 configs/cortina_presidio-asic-spi-nor_defconfig