From patchwork Mon May 6 09:16:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 1095757 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=st.com header.i=@st.com header.b="wCbnkCHF"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44yHKb50SMz9s5c for ; Mon, 6 May 2019 19:21:07 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 3D7BEC21D4A; Mon, 6 May 2019 09:19:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 32EDEC21DD4; Mon, 6 May 2019 09:17:24 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 8B4E3C21E15; Mon, 6 May 2019 09:17:17 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id B8D67C21C27 for ; Mon, 6 May 2019 09:17:14 +0000 (UTC) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4692IlR009573; Mon, 6 May 2019 11:17:10 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=iMGNaUqQ26PV9zQWnI7yBb2dFv3vGqmzKjNlCHHjz1Q=; b=wCbnkCHFUEKj7qHzhKJ8K0BYef0BZHI4ShOP0CpoyzeNEUAZj31F5f2+kHvO2Z/gcdGN Z1nD71IyvVLjyiJwXHgSFvzXC/RiBVrJvfGclG2BEM3Qe0f7l+S2uJRVPLPxep+XO/rA 5qxpK4CEBlGhCvD99sWMxD49huY4a6yJEdoYXkN1OmwFFLYv3EweGVy+eFbbgxRb9x+U 5sTf6wGEw/c4VM7U4z9uL9QBki6w3jeYEBdFQRsJN82G8FQ8bXIQjv0/oopPXaLsMW5I nk9CWWu5dmoErRSQkjaEX8HuAOdT1s9Yf1FKCMBrNcHnGmdNDR4Pn3dQftFwUjcKmb4x 1A== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2s94c38k2h-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 06 May 2019 11:17:10 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id EFEB538; Mon, 6 May 2019 09:17:08 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D5FBF15BC; Mon, 6 May 2019 09:17:08 +0000 (GMT) Received: from localhost (10.75.127.47) by SFHDAG6NODE3.st.com (10.75.127.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 6 May 2019 11:17:08 +0200 From: Patrice Chotard To: Date: Mon, 6 May 2019 11:16:52 +0200 Message-ID: <1557134223-4549-2-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1557134223-4549-1-git-send-email-patrice.chotard@st.com> References: <1557134223-4549-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG8NODE2.st.com (10.75.127.23) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-06_06:, , signatures=0 Cc: U-Boot STM32 Subject: [U-Boot] [PATCH 01/12] mach-stm32: Add MPU region for spi-nor memory mapped region X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The Quad-SPI interface is able to manage up to 256Mbytes Flash memory starting from 0x90000000 to 0x9FFFFFFF in the memory mapped mode. Add a dedicated MPU region into stm32_region_config. See application note AN4760 available at www.st.com Signed-off-by: Patrice Chotard --- arch/arm/mach-stm32/soc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-stm32/soc.c b/arch/arm/mach-stm32/soc.c index 738305c..6ae31d3 100644 --- a/arch/arm/mach-stm32/soc.c +++ b/arch/arm/mach-stm32/soc.c @@ -21,6 +21,9 @@ int arch_cpu_init(void) O_I_WB_RD_WR_ALLOC, REGION_16MB }, #endif + { 0x90000000, REGION_1, XN_DIS, PRIV_RW_USR_RW, + SHARED_WRITE_BUFFERED, REGION_256MB }, + #if defined(CONFIG_STM32F7) || defined(CONFIG_STM32H7) { 0xC0000000, REGION_0, XN_DIS, PRIV_RW_USR_RW, O_I_WB_RD_WR_ALLOC, REGION_512MB },