From patchwork Mon May 6 09:17:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 1095756 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=st.com header.i=@st.com header.b="rchL46vU"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44yHKV5YsLz9s4V for ; Mon, 6 May 2019 19:21:02 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id E0194C21DB6; Mon, 6 May 2019 09:19:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A8B48C21DFD; Mon, 6 May 2019 09:17:29 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id F10ECC21DFB; Mon, 6 May 2019 09:17:21 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id 56910C21C50 for ; Mon, 6 May 2019 09:17:17 +0000 (UTC) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4698W2f006416; Mon, 6 May 2019 11:17:16 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=zS2lijl/RL9efAAs0wPDgJoPGiXRSS4y7K4oo4t++Ec=; b=rchL46vUPCmKITOaMR9juOK5UT95IXoU61Pb2PelCEB1/VPLQZyd+jDUgj9yiJ/degN8 0ILQETpQKRwUGBnyAduDo6SgzBWUiym4FSL2E+q6Tjgahxin03T3Yat3F8maDVtlEaRA MzQACo+z7/XgRr/j3KhsklXGx1XZ4qWSZZUAc6/kAJVCV1/+YhfMfZlWl5dCLYe8iJHB XsQHT8BDg0K4/KqjHXu/ho0+gnUsvkY+uCTYU/XDHLneASwBe+2tKG8quD8jbhZ1JUhl wR+5mF5WVry416+Pd6P/ynXS/QlzerbaB/87GAXrsa32Xq6Qr9Xsh3uxTly1EYvX+4Ef Vg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2s94cb8jnt-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 06 May 2019 11:17:16 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9D0F634; Mon, 6 May 2019 09:17:15 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7CAC115C7; Mon, 6 May 2019 09:17:15 +0000 (GMT) Received: from localhost (10.75.127.45) by SFHDAG6NODE3.st.com (10.75.127.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 6 May 2019 11:17:15 +0200 From: Patrice Chotard To: Date: Mon, 6 May 2019 11:17:00 +0200 Message-ID: <1557134223-4549-10-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1557134223-4549-1-git-send-email-patrice.chotard@st.com> References: <1557134223-4549-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG1NODE3.st.com (10.75.127.3) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-06_06:, , signatures=0 Cc: Tom Rini , U-Boot STM32 Subject: [U-Boot] [PATCH 09/12] ARM: dts: stm32: Add qspi support for stm32f469-disco board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add device tree nodes to support qspi for stm32f469-disco board. Signed-off-by: Patrice Chotard --- arch/arm/dts/stm32f469-disco-u-boot.dtsi | 39 ++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi index a980ac4..3da308e 100644 --- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi @@ -23,6 +23,7 @@ gpio8 = &gpioi; gpio9 = &gpioj; gpio10 = &gpiok; + spi0 = &qspi; }; soc { @@ -64,6 +65,19 @@ st,sdram-refcount = < 1292 >; }; }; + + qspi: quadspi@A0001000 { + compatible = "st,stm32-qspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>; + reg-names = "qspi", "qspi_mm"; + interrupts = <91>; + spi-max-frequency = <108000000>; + clocks = <&rcc 0 STM32F4_AHB3_CLOCK(QSPI)>; + resets = <&rcc STM32F4_AHB3_RESET(QSPI)>; + pinctrl-0 = <&qspi_pins>; + }; }; }; @@ -205,6 +219,18 @@ }; }; + qspi_pins: qspi@0 { + pins { + pinmux = , /* CLK */ + , /* BK1_NCS */ + , /* BK1_IO0 */ + , /* BK1_IO1 */ + , /* BK1_IO2 */ + ; /* BK1_IO3 */ + slew-rate = <2>; + }; + }; + usart3_pins_a: usart3@0 { u-boot,dm-pre-reloc; pins1 { @@ -227,3 +253,16 @@ &syscfg { u-boot,dm-pre-reloc; }; + +&qspi { + reg = <0xA0001000 0x1000>, <0x90000000 0x1000000>; + flash0: n25q128a { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <108000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + reg = <0>; + }; +};