From patchwork Fri Apr 26 09:22:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?V2VpamllIEdhbyAo6auY5oOf5p2wKQ==?= X-Patchwork-Id: 1091433 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=mediatek.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44r7v25rtXz9s3Z for ; Fri, 26 Apr 2019 19:25:18 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id EA1D5C21EA8; Fri, 26 Apr 2019 09:24:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: * X-Spam-Status: No, score=1.3 required=5.0 tests=RDNS_NONE, UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 67488C21E7E; Fri, 26 Apr 2019 09:24:02 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 6E654C21E36; Fri, 26 Apr 2019 09:23:02 +0000 (UTC) Received: from mailgw02.mediatek.com (unknown [1.203.163.81]) by lists.denx.de (Postfix) with ESMTP id 87472C21E30 for ; Fri, 26 Apr 2019 09:22:57 +0000 (UTC) X-UUID: 4ef291774a6e4d23bef635afa3e5986d-20190426 X-UUID: 4ef291774a6e4d23bef635afa3e5986d-20190426 Received: from mtkcas35.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 1876188105; Fri, 26 Apr 2019 17:22:46 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 26 Apr 2019 17:22:44 +0800 Received: from mcddlt001.mediatek.inc (172.27.4.253) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 26 Apr 2019 17:22:44 +0800 From: Weijie Gao To: Date: Fri, 26 Apr 2019 17:22:43 +0800 Message-ID: <1556270563-7746-1-git-send-email-weijie.gao@mediatek.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-MTK: N Cc: GSS_MTK_Uboot_upstream Subject: [U-Boot] [PATCH 4/5] arm: dts: change MT7629 to use spi-mem rather than qspi X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The original mtk_qspi driver has been removed. We change MT7629 to use newly added mtk-spimem driver. Signed-off-by: Weijie Gao --- arch/arm/dts/mt7629-rfb.dts | 18 +++++++++++++----- arch/arm/dts/mt7629.dtsi | 14 ++++++++++---- 2 files changed, 23 insertions(+), 9 deletions(-) diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts index 4612218..a55ffa6 100644 --- a/arch/arm/dts/mt7629-rfb.dts +++ b/arch/arm/dts/mt7629-rfb.dts @@ -13,7 +13,7 @@ compatible = "mediatek,mt7629-rfb", "mediatek,mt7629"; aliases { - spi0 = &qspi; + spi0 = &spimem; }; chosen { @@ -34,7 +34,14 @@ }; &pinctrl { - qspi_pins: qspi-pins { + snfi_pins: snfi-pins { + mux { + function = "flash"; + groups = "snfi"; + }; + }; + + snor_pins: snor-pins { mux { function = "flash"; groups = "spi_nor"; @@ -56,9 +63,10 @@ }; }; -&qspi { - pinctrl-names = "default"; - pinctrl-0 = <&qspi_pins>; +&spimem { + pinctrl-names = "default", "snor_mmap"; + pinctrl-0 = <&snfi_pins>; + pinctrl-1 = <&snor_pins>; status = "okay"; spi-flash@0{ diff --git a/arch/arm/dts/mt7629.dtsi b/arch/arm/dts/mt7629.dtsi index c87115e..9dedb88 100644 --- a/arch/arm/dts/mt7629.dtsi +++ b/arch/arm/dts/mt7629.dtsi @@ -215,10 +215,16 @@ status = "disabled"; }; - qspi: qspi@11014000 { - compatible = "mediatek,mt7629-qspi"; - reg = <0x11014000 0xe0>, <0x30000000 0x10000000>; - reg-names = "reg_base", "mem_base"; + spimem: spimem@1100d000 { + compatible = "mediatek,mtk-spimem"; + reg = <0x1100d000 0x2000>; + clocks = <&pericfg CLK_PERI_NFI_PD>, + <&pericfg CLK_PERI_SNFI_PD>; + clock-names = "nfi_clk", "pad_clk"; + assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>, + <&topckgen CLK_TOP_NFI_INFRA_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>, + <&topckgen CLK_TOP_UNIVPLL2_D8>; status = "disabled"; #address-cells = <1>; #size-cells = <0>;