diff mbox series

[U-Boot] riscv:Add Microchip MPFS Icicle Board support

Message ID 1555521546-22325-1-git-send-email-padmarao.begari@microchip.com
State Superseded
Delegated to: Andes
Headers show
Series [U-Boot] riscv:Add Microchip MPFS Icicle Board support | expand

Commit Message

Padmarao Begari April 17, 2019, 5:19 p.m. UTC 
This patch adds Microchip MPFS Icicle Board support.
For now, NS16550 serial driver is only enabled.
The Microchip MPFS Icicle defconfig by default builds
U-Boot for M-Mode with SMP support.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
---
 arch/riscv/Kconfig                        |  4 ++
 board/microchip/mpfs-icicle/Kconfig       | 20 ++++++++++
 board/microchip/mpfs-icicle/MAINTAINERS   |  7 ++++
 board/microchip/mpfs-icicle/Makefile      |  7 ++++
 board/microchip/mpfs-icicle/mpfs-icicle.c | 31 +++++++++++++++
 configs/microchip-mpfs-icicle_defconfig   | 16 ++++++++
 include/configs/microchip-mpfs-icicle.h   | 63 +++++++++++++++++++++++++++++++
 7 files changed, 148 insertions(+)
 create mode 100644 board/microchip/mpfs-icicle/Kconfig
 create mode 100644 board/microchip/mpfs-icicle/MAINTAINERS
 create mode 100644 board/microchip/mpfs-icicle/Makefile
 create mode 100644 board/microchip/mpfs-icicle/mpfs-icicle.c
 create mode 100644 configs/microchip-mpfs-icicle_defconfig
 create mode 100644 include/configs/microchip-mpfs-icicle.h

Comments

Bin Meng April 23, 2019, 1:11 p.m. UTC | #1 
Hi Padmarao,

On Thu, Apr 18, 2019 at 2:21 AM Padmarao Begari
<padmarao.begari@microchip.com> wrote:
>
> This patch adds Microchip MPFS Icicle Board support.

nits: Board->board. Please fix the commit message too.

> For now, NS16550 serial driver is only enabled.
> The Microchip MPFS Icicle defconfig by default builds
> U-Boot for M-Mode with SMP support.
>
> Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
> ---
>  arch/riscv/Kconfig                        |  4 ++
>  board/microchip/mpfs-icicle/Kconfig       | 20 ++++++++++
>  board/microchip/mpfs-icicle/MAINTAINERS   |  7 ++++
>  board/microchip/mpfs-icicle/Makefile      |  7 ++++
>  board/microchip/mpfs-icicle/mpfs-icicle.c | 31 +++++++++++++++
>  configs/microchip-mpfs-icicle_defconfig   | 16 ++++++++
>  include/configs/microchip-mpfs-icicle.h   | 63 +++++++++++++++++++++++++++++++
>  7 files changed, 148 insertions(+)
>  create mode 100644 board/microchip/mpfs-icicle/Kconfig
>  create mode 100644 board/microchip/mpfs-icicle/MAINTAINERS
>  create mode 100644 board/microchip/mpfs-icicle/Makefile
>  create mode 100644 board/microchip/mpfs-icicle/mpfs-icicle.c
>  create mode 100644 configs/microchip-mpfs-icicle_defconfig
>  create mode 100644 include/configs/microchip-mpfs-icicle.h
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index ae8ff7b..df9b2ea 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -17,12 +17,16 @@ config TARGET_QEMU_VIRT
>  config TARGET_SIFIVE_FU540
>         bool "Support SiFive FU540 Board"
>
> +config TARGET_MICROCHIP_MPFS

I assume MPFS stands for Microchip PolarFire-SoC? And the board is
called Icicle? If yes, shouldn't this be TARGET_MICROCHIP_ICICLE?

nits: TARGET_MICROCHIP_xxx should come before TARGET_SIFIVE_

> +       bool "Support Microchip PolarFire-SoC Icicle Board"
> +
>  endchoice
>
>  # board-specific options below
>  source "board/AndesTech/ax25-ae350/Kconfig"
>  source "board/emulation/qemu-riscv/Kconfig"
>  source "board/sifive/fu540/Kconfig"
> +source "board/microchip/mpfs-icicle/Kconfig"

nits: please put it in the alphabetical order

For naming convention, please use mpfs_icicle (_ instead of -)

>
>  # platform-specific options below
>  source "arch/riscv/cpu/ax25/Kconfig"
> diff --git a/board/microchip/mpfs-icicle/Kconfig b/board/microchip/mpfs-icicle/Kconfig
> new file mode 100644
> index 0000000..e17ba78
> --- /dev/null
> +++ b/board/microchip/mpfs-icicle/Kconfig
> @@ -0,0 +1,20 @@
> +if TARGET_MICROCHIP_MPFS
> +
> +config SYS_BOARD
> +       default "mpfs-icicle"
> +
> +config SYS_VENDOR
> +       default "microchip"
> +
> +config SYS_CPU
> +       default "generic"
> +
> +config SYS_CONFIG_NAME
> +       default "microchip-mpfs-icicle"

nits: use _ instead of -

> +
> +config BOARD_SPECIFIC_OPTIONS # dummy
> +       def_bool y
> +       select GENERIC_RISCV
> +       imply SMP
> +
> +endif
> diff --git a/board/microchip/mpfs-icicle/MAINTAINERS b/board/microchip/mpfs-icicle/MAINTAINERS
> new file mode 100644
> index 0000000..9987efe
> --- /dev/null
> +++ b/board/microchip/mpfs-icicle/MAINTAINERS
> @@ -0,0 +1,7 @@
> +Microchip MPFS icicle
> +M:     Padmarao Begari <padmarao.begari@microchip.com>
> +M:     Cyril Jean <cyril.jean@microchip.com>
> +S:     Maintained
> +F:     board/microchip/mpfs-icicle/
> +F:     include/configs/microchip-mpfs-icicle.h
> +F:     configs/microchip-mpfs-icicle_defconfig
> diff --git a/board/microchip/mpfs-icicle/Makefile b/board/microchip/mpfs-icicle/Makefile
> new file mode 100644
> index 0000000..4706586
> --- /dev/null
> +++ b/board/microchip/mpfs-icicle/Makefile
> @@ -0,0 +1,7 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2019 Microchip Technology Inc.
> +# Padmarao Begari <padmarao.begari@microchip.com>
> +#
> +
> +obj-y  += mpfs-icicle.o
> diff --git a/board/microchip/mpfs-icicle/mpfs-icicle.c b/board/microchip/mpfs-icicle/mpfs-icicle.c
> new file mode 100644
> index 0000000..5a23a7d
> --- /dev/null
> +++ b/board/microchip/mpfs-icicle/mpfs-icicle.c
> @@ -0,0 +1,31 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019 Microchip Technology Inc.
> + * Padmarao Begari <padmarao.begari@microchip.com>
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <asm/io.h>
> +
> +#define MPFS_SYSREG_SOFT_RESET ((unsigned int *)0x20002088)
> +
> +int board_init(void)
> +{
> +       /* For now nothing to do here. */
> +
> +       return 0;
> +}
> +
> +#ifdef CONFIG_BOARD_EARLY_INIT_F

Can this be optionally turned off? If not, please select it in
BOARD_SPECIFIC_OPTIONS, and remove the #ifdef here.

> +int board_early_init_f(void)
> +{
> +       unsigned int val;

nits: should have a blank line here

> +       /* Reset uart peripheral */
> +       val = readl(MPFS_SYSREG_SOFT_RESET);
> +       val = (val & ~(1u << 5u));
> +       writel(val, MPFS_SYSREG_SOFT_RESET);
> +
> +       return 0;
> +}
> +#endif
> diff --git a/configs/microchip-mpfs-icicle_defconfig b/configs/microchip-mpfs-icicle_defconfig
> new file mode 100644
> index 0000000..2d1bd4a
> --- /dev/null
> +++ b/configs/microchip-mpfs-icicle_defconfig
> @@ -0,0 +1,16 @@
> +CONFIG_RISCV=y
> +CONFIG_SYS_TEXT_BASE=0x80000000
> +CONFIG_ARCH_RV64I=y
> +CONFIG_NR_CPUS=5
> +CONFIG_TARGET_MICROCHIP_MPFS=y
> +CONFIG_BOOTDELAY=3
> +CONFIG_DISTRO_DEFAULTS=y
> +CONFIG_SYS_PROMPT="RISC-V # "
> +CONFIG_FIT=y
> +CONFIG_DM=y
> +CONFIG_BAUDRATE=57600
> +CONFIG_DM_SERIAL=y
> +CONFIG_SYS_NS16550=y
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_OF_PRIOR_STAGE=y
> +CONFIG_BOARD_EARLY_INIT_F=y
> diff --git a/include/configs/microchip-mpfs-icicle.h b/include/configs/microchip-mpfs-icicle.h
> new file mode 100644
> index 0000000..82c7fbb
> --- /dev/null
> +++ b/include/configs/microchip-mpfs-icicle.h
> @@ -0,0 +1,63 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2019 Microchip Technology Inc.
> + * Padmarao Begari <padmarao.begari@microchip.com>
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/*
> + * CPU and Board Configuration Options
> + */
> +#define CONFIG_BOOTP_SEND_HOSTNAME
> +
> +/*
> + * Miscellaneous configurable options
> + */
> +#define CONFIG_SYS_CBSIZE      1024 /* Console I/O Buffer Size */
> +
> +/*
> + * Print Buffer Size
> + */
> +#define CONFIG_SYS_PBSIZE      \
> +       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> +
> +/*
> + * max number of command args
> + */
> +#define CONFIG_SYS_MAXARGS     16
> +
> +/*
> + * Boot Argument Buffer Size
> + */
> +#define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE
> +
> +/*
> + * Size of malloc() pool
> + * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough
> + */
> +#define CONFIG_SYS_MALLOC_LEN  (512 << 10)
> +
> +/*
> + * Physical Memory Map
> + */
> +#define PHYS_SDRAM_0           0x80000000 /* SDRAM Bank #1 */
> +#define PHYS_SDRAM_0_SIZE      0x40000000 /* 1 GB */
> +#define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_0
> +
> +/* Init Stack Pointer */
> +#define CONFIG_SYS_INIT_SP_ADDR        (CONFIG_SYS_SDRAM_BASE + 0x200000)
> +
> +#define CONFIG_SYS_LOAD_ADDR   0x80000000 /* SDRAM */
> +
> +/*
> + * memtest works on DRAM
> + */
> +#define CONFIG_SYS_MEMTEST_START       PHYS_SDRAM_0
> +#define CONFIG_SYS_MEMTEST_END         (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)
> +
> +/* When we use RAM as ENV */
> +#define CONFIG_ENV_SIZE        0x2000
> +
> +#endif /* __CONFIG_H */

Regards,
Bin
Padmarao Begari April 24, 2019, 5:58 a.m. UTC | #2 
Hi Bin,

On Tue, Apr 23, 2019 at 6:42 PM Bin Meng <bmeng.cn@gmail.com> wrote:

> Hi Padmarao,
>
> On Thu, Apr 18, 2019 at 2:21 AM Padmarao Begari
> <padmarao.begari@microchip.com> wrote:
> >
> > This patch adds Microchip MPFS Icicle Board support.
>
> nits: Board->board. Please fix the commit message too.
>
Ok

> > For now, NS16550 serial driver is only enabled.
> > The Microchip MPFS Icicle defconfig by default builds
> > U-Boot for M-Mode with SMP support.
> >
> > Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
> > ---
> >  arch/riscv/Kconfig                        |  4 ++
> >  board/microchip/mpfs-icicle/Kconfig       | 20 ++++++++++
> >  board/microchip/mpfs-icicle/MAINTAINERS   |  7 ++++
> >  board/microchip/mpfs-icicle/Makefile      |  7 ++++
> >  board/microchip/mpfs-icicle/mpfs-icicle.c | 31 +++++++++++++++
> >  configs/microchip-mpfs-icicle_defconfig   | 16 ++++++++
> >  include/configs/microchip-mpfs-icicle.h   | 63
> +++++++++++++++++++++++++++++++
> >  7 files changed, 148 insertions(+)
> >  create mode 100644 board/microchip/mpfs-icicle/Kconfig
> >  create mode 100644 board/microchip/mpfs-icicle/MAINTAINERS
> >  create mode 100644 board/microchip/mpfs-icicle/Makefile
> >  create mode 100644 board/microchip/mpfs-icicle/mpfs-icicle.c
> >  create mode 100644 configs/microchip-mpfs-icicle_defconfig
> >  create mode 100644 include/configs/microchip-mpfs-icicle.h
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index ae8ff7b..df9b2ea 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -17,12 +17,16 @@ config TARGET_QEMU_VIRT
> >  config TARGET_SIFIVE_FU540
> >         bool "Support SiFive FU540 Board"
> >
> > +config TARGET_MICROCHIP_MPFS
>
> I assume MPFS stands for Microchip PolarFire-SoC? And the board is
> called Icicle? If yes, shouldn't this be TARGET_MICROCHIP_ICICLE?
>
yes, I will use TARGET_MICROCHIP_ICICLE

>
> nits: TARGET_MICROCHIP_xxx should come before TARGET_SIFIVE_
>
Ok

>
> > +       bool "Support Microchip PolarFire-SoC Icicle Board"
> > +
> >  endchoice
> >
> >  # board-specific options below
> >  source "board/AndesTech/ax25-ae350/Kconfig"
> >  source "board/emulation/qemu-riscv/Kconfig"
> >  source "board/sifive/fu540/Kconfig"
> > +source "board/microchip/mpfs-icicle/Kconfig"
>
> nits: please put it in the alphabetical order
>
Ok

>
> For naming convention, please use mpfs_icicle (_ instead of -)
>
Ok

>
> >
> >  # platform-specific options below
> >  source "arch/riscv/cpu/ax25/Kconfig"
> > diff --git a/board/microchip/mpfs-icicle/Kconfig
> b/board/microchip/mpfs-icicle/Kconfig
> > new file mode 100644
> > index 0000000..e17ba78
> > --- /dev/null
> > +++ b/board/microchip/mpfs-icicle/Kconfig
> > @@ -0,0 +1,20 @@
> > +if TARGET_MICROCHIP_MPFS
> > +
> > +config SYS_BOARD
> > +       default "mpfs-icicle"
> > +
> > +config SYS_VENDOR
> > +       default "microchip"
> > +
> > +config SYS_CPU
> > +       default "generic"
> > +
> > +config SYS_CONFIG_NAME
> > +       default "microchip-mpfs-icicle"
>
> nits: use _ instead of -
>
Ok

>
> > +
> > +config BOARD_SPECIFIC_OPTIONS # dummy
> > +       def_bool y
> > +       select GENERIC_RISCV
> > +       imply SMP
> > +
> > +endif
> > diff --git a/board/microchip/mpfs-icicle/MAINTAINERS
> b/board/microchip/mpfs-icicle/MAINTAINERS
> > new file mode 100644
> > index 0000000..9987efe
> > --- /dev/null
> > +++ b/board/microchip/mpfs-icicle/MAINTAINERS
> > @@ -0,0 +1,7 @@
> > +Microchip MPFS icicle
> > +M:     Padmarao Begari <padmarao.begari@microchip.com>
> > +M:     Cyril Jean <cyril.jean@microchip.com>
> > +S:     Maintained
> > +F:     board/microchip/mpfs-icicle/
> > +F:     include/configs/microchip-mpfs-icicle.h
> > +F:     configs/microchip-mpfs-icicle_defconfig
> > diff --git a/board/microchip/mpfs-icicle/Makefile
> b/board/microchip/mpfs-icicle/Makefile
> > new file mode 100644
> > index 0000000..4706586
> > --- /dev/null
> > +++ b/board/microchip/mpfs-icicle/Makefile
> > @@ -0,0 +1,7 @@
> > +# SPDX-License-Identifier: GPL-2.0+
> > +#
> > +# Copyright (C) 2019 Microchip Technology Inc.
> > +# Padmarao Begari <padmarao.begari@microchip.com>
> > +#
> > +
> > +obj-y  += mpfs-icicle.o
> > diff --git a/board/microchip/mpfs-icicle/mpfs-icicle.c
> b/board/microchip/mpfs-icicle/mpfs-icicle.c
> > new file mode 100644
> > index 0000000..5a23a7d
> > --- /dev/null
> > +++ b/board/microchip/mpfs-icicle/mpfs-icicle.c
> > @@ -0,0 +1,31 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2019 Microchip Technology Inc.
> > + * Padmarao Begari <padmarao.begari@microchip.com>
> > + */
> > +
> > +#include <common.h>
> > +#include <dm.h>
> > +#include <asm/io.h>
> > +
> > +#define MPFS_SYSREG_SOFT_RESET ((unsigned int *)0x20002088)
> > +
> > +int board_init(void)
> > +{
> > +       /* For now nothing to do here. */
> > +
> > +       return 0;
> > +}
> > +
> > +#ifdef CONFIG_BOARD_EARLY_INIT_F
>
> Can this be optionally turned off? If not, please select it in
> BOARD_SPECIFIC_OPTIONS, and remove the #ifdef here.
>
Ok

>
> > +int board_early_init_f(void)
> > +{
> > +       unsigned int val;
>
> nits: should have a blank line here
>
Ok

Thanks for review.
Padmarao


>
> > +       /* Reset uart peripheral */
> > +       val = readl(MPFS_SYSREG_SOFT_RESET);
> > +       val = (val & ~(1u << 5u));
> > +       writel(val, MPFS_SYSREG_SOFT_RESET);
> > +
> > +       return 0;
> > +}
> > +#endif
> > diff --git a/configs/microchip-mpfs-icicle_defconfig
> b/configs/microchip-mpfs-icicle_defconfig
> > new file mode 100644
> > index 0000000..2d1bd4a
> > --- /dev/null
> > +++ b/configs/microchip-mpfs-icicle_defconfig
> > @@ -0,0 +1,16 @@
> > +CONFIG_RISCV=y
> > +CONFIG_SYS_TEXT_BASE=0x80000000
> > +CONFIG_ARCH_RV64I=y
> > +CONFIG_NR_CPUS=5
> > +CONFIG_TARGET_MICROCHIP_MPFS=y
> > +CONFIG_BOOTDELAY=3
> > +CONFIG_DISTRO_DEFAULTS=y
> > +CONFIG_SYS_PROMPT="RISC-V # "
> > +CONFIG_FIT=y
> > +CONFIG_DM=y
> > +CONFIG_BAUDRATE=57600
> > +CONFIG_DM_SERIAL=y
> > +CONFIG_SYS_NS16550=y
> > +CONFIG_NR_DRAM_BANKS=1
> > +CONFIG_OF_PRIOR_STAGE=y
> > +CONFIG_BOARD_EARLY_INIT_F=y
> > diff --git a/include/configs/microchip-mpfs-icicle.h
> b/include/configs/microchip-mpfs-icicle.h
> > new file mode 100644
> > index 0000000..82c7fbb
> > --- /dev/null
> > +++ b/include/configs/microchip-mpfs-icicle.h
> > @@ -0,0 +1,63 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright (C) 2019 Microchip Technology Inc.
> > + * Padmarao Begari <padmarao.begari@microchip.com>
> > + */
> > +
> > +#ifndef __CONFIG_H
> > +#define __CONFIG_H
> > +
> > +/*
> > + * CPU and Board Configuration Options
> > + */
> > +#define CONFIG_BOOTP_SEND_HOSTNAME
> > +
> > +/*
> > + * Miscellaneous configurable options
> > + */
> > +#define CONFIG_SYS_CBSIZE      1024 /* Console I/O Buffer Size */
> > +
> > +/*
> > + * Print Buffer Size
> > + */
> > +#define CONFIG_SYS_PBSIZE      \
> > +       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
> > +
> > +/*
> > + * max number of command args
> > + */
> > +#define CONFIG_SYS_MAXARGS     16
> > +
> > +/*
> > + * Boot Argument Buffer Size
> > + */
> > +#define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE
> > +
> > +/*
> > + * Size of malloc() pool
> > + * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough
> > + */
> > +#define CONFIG_SYS_MALLOC_LEN  (512 << 10)
> > +
> > +/*
> > + * Physical Memory Map
> > + */
> > +#define PHYS_SDRAM_0           0x80000000 /* SDRAM Bank #1 */
> > +#define PHYS_SDRAM_0_SIZE      0x40000000 /* 1 GB */
> > +#define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_0
> > +
> > +/* Init Stack Pointer */
> > +#define CONFIG_SYS_INIT_SP_ADDR        (CONFIG_SYS_SDRAM_BASE +
> 0x200000)
> > +
> > +#define CONFIG_SYS_LOAD_ADDR   0x80000000 /* SDRAM */
> > +
> > +/*
> > + * memtest works on DRAM
> > + */
> > +#define CONFIG_SYS_MEMTEST_START       PHYS_SDRAM_0
> > +#define CONFIG_SYS_MEMTEST_END         (PHYS_SDRAM_0 +
> PHYS_SDRAM_0_SIZE)
> > +
> > +/* When we use RAM as ENV */
> > +#define CONFIG_ENV_SIZE        0x2000
> > +
> > +#endif /* __CONFIG_H */
>
> Regards,
> Bin
> _______________________________________________
> U-Boot mailing list
> U-Boot@lists.denx.de
> https://lists.denx.de/listinfo/u-boot
>
diff mbox series

Patch

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index ae8ff7b..df9b2ea 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -17,12 +17,16 @@  config TARGET_QEMU_VIRT
 config TARGET_SIFIVE_FU540
 	bool "Support SiFive FU540 Board"
 
+config TARGET_MICROCHIP_MPFS
+	bool "Support Microchip PolarFire-SoC Icicle Board"
+
 endchoice
 
 # board-specific options below
 source "board/AndesTech/ax25-ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
 source "board/sifive/fu540/Kconfig"
+source "board/microchip/mpfs-icicle/Kconfig"
 
 # platform-specific options below
 source "arch/riscv/cpu/ax25/Kconfig"
diff --git a/board/microchip/mpfs-icicle/Kconfig b/board/microchip/mpfs-icicle/Kconfig
new file mode 100644
index 0000000..e17ba78
--- /dev/null
+++ b/board/microchip/mpfs-icicle/Kconfig
@@ -0,0 +1,20 @@ 
+if TARGET_MICROCHIP_MPFS
+
+config SYS_BOARD
+	default "mpfs-icicle"
+
+config SYS_VENDOR
+	default "microchip"
+
+config SYS_CPU
+	default "generic"
+
+config SYS_CONFIG_NAME
+	default "microchip-mpfs-icicle"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select GENERIC_RISCV
+	imply SMP
+
+endif
diff --git a/board/microchip/mpfs-icicle/MAINTAINERS b/board/microchip/mpfs-icicle/MAINTAINERS
new file mode 100644
index 0000000..9987efe
--- /dev/null
+++ b/board/microchip/mpfs-icicle/MAINTAINERS
@@ -0,0 +1,7 @@ 
+Microchip MPFS icicle
+M:	Padmarao Begari <padmarao.begari@microchip.com>
+M:	Cyril Jean <cyril.jean@microchip.com>
+S:	Maintained
+F:	board/microchip/mpfs-icicle/
+F:	include/configs/microchip-mpfs-icicle.h
+F:	configs/microchip-mpfs-icicle_defconfig
diff --git a/board/microchip/mpfs-icicle/Makefile b/board/microchip/mpfs-icicle/Makefile
new file mode 100644
index 0000000..4706586
--- /dev/null
+++ b/board/microchip/mpfs-icicle/Makefile
@@ -0,0 +1,7 @@ 
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2019 Microchip Technology Inc.
+# Padmarao Begari <padmarao.begari@microchip.com>
+#
+
+obj-y	+= mpfs-icicle.o
diff --git a/board/microchip/mpfs-icicle/mpfs-icicle.c b/board/microchip/mpfs-icicle/mpfs-icicle.c
new file mode 100644
index 0000000..5a23a7d
--- /dev/null
+++ b/board/microchip/mpfs-icicle/mpfs-icicle.c
@@ -0,0 +1,31 @@ 
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Microchip Technology Inc.
+ * Padmarao Begari <padmarao.begari@microchip.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+
+#define MPFS_SYSREG_SOFT_RESET	((unsigned int *)0x20002088)
+
+int board_init(void)
+{
+	/* For now nothing to do here. */
+
+	return 0;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+	unsigned int val;
+	/* Reset uart peripheral */
+	val = readl(MPFS_SYSREG_SOFT_RESET);
+	val = (val & ~(1u << 5u));
+	writel(val, MPFS_SYSREG_SOFT_RESET);
+
+	return 0;
+}
+#endif
diff --git a/configs/microchip-mpfs-icicle_defconfig b/configs/microchip-mpfs-icicle_defconfig
new file mode 100644
index 0000000..2d1bd4a
--- /dev/null
+++ b/configs/microchip-mpfs-icicle_defconfig
@@ -0,0 +1,16 @@ 
+CONFIG_RISCV=y
+CONFIG_SYS_TEXT_BASE=0x80000000
+CONFIG_ARCH_RV64I=y
+CONFIG_NR_CPUS=5
+CONFIG_TARGET_MICROCHIP_MPFS=y
+CONFIG_BOOTDELAY=3
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_PROMPT="RISC-V # "
+CONFIG_FIT=y
+CONFIG_DM=y
+CONFIG_BAUDRATE=57600
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_OF_PRIOR_STAGE=y
+CONFIG_BOARD_EARLY_INIT_F=y
diff --git a/include/configs/microchip-mpfs-icicle.h b/include/configs/microchip-mpfs-icicle.h
new file mode 100644
index 0000000..82c7fbb
--- /dev/null
+++ b/include/configs/microchip-mpfs-icicle.h
@@ -0,0 +1,63 @@ 
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Microchip Technology Inc.
+ * Padmarao Begari <padmarao.begari@microchip.com>
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * CPU and Board Configuration Options
+ */
+#define CONFIG_BOOTP_SEND_HOSTNAME
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_CBSIZE	1024 /* Console I/O Buffer Size */
+
+/*
+ * Print Buffer Size
+ */
+#define CONFIG_SYS_PBSIZE	\
+	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/*
+ * max number of command args
+ */
+#define CONFIG_SYS_MAXARGS	16
+
+/*
+ * Boot Argument Buffer Size
+ */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+
+/*
+ * Size of malloc() pool
+ * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough
+ */
+#define CONFIG_SYS_MALLOC_LEN	(512 << 10)
+
+/*
+ * Physical Memory Map
+ */
+#define PHYS_SDRAM_0		0x80000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_0_SIZE	0x40000000 /* 1 GB */
+#define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_0
+
+/* Init Stack Pointer */
+#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_SDRAM_BASE + 0x200000)
+
+#define CONFIG_SYS_LOAD_ADDR	0x80000000 /* SDRAM */
+
+/*
+ * memtest works on DRAM
+ */
+#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_0
+#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)
+
+/* When we use RAM as ENV */
+#define CONFIG_ENV_SIZE	0x2000
+
+#endif /* __CONFIG_H */