From patchwork Mon Dec 3 09:52:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 1006753 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 437gNk2H7hz9s47 for ; Mon, 3 Dec 2018 20:55:50 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 0CE77C2210F; Mon, 3 Dec 2018 09:54:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id CC933C22180; Mon, 3 Dec 2018 09:53:42 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 597B4C2218B; Mon, 3 Dec 2018 09:53:27 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id 97C1FC22167 for ; Mon, 3 Dec 2018 09:53:23 +0000 (UTC) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id wB39pHxF000959; Mon, 3 Dec 2018 10:53:22 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2p3u7v8yjk-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 03 Dec 2018 10:53:22 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B61BB3A; Mon, 3 Dec 2018 09:53:21 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 93D0012F7; Mon, 3 Dec 2018 09:53:21 +0000 (GMT) Received: from localhost (10.75.127.46) by SFHDAG6NODE3.st.com (10.75.127.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 3 Dec 2018 10:53:21 +0100 From: Patrice Chotard To: Date: Mon, 3 Dec 2018 10:52:52 +0100 Message-ID: <1543830774-19999-4-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1543830774-19999-1-git-send-email-patrice.chotard@st.com> References: <1543830774-19999-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG7NODE1.st.com (10.75.127.19) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-12-03_05:, , signatures=0 Cc: U-Boot STM32 Subject: [U-Boot] [PATCH 3/5] gpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.h X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" To allow access to this define by other driver, move it into gpio.h Signed-off-by: Patrice Chotard --- arch/arm/include/asm/arch-stm32/gpio.h | 2 ++ arch/arm/mach-stm32mp/include/mach/gpio.h | 2 ++ drivers/gpio/stm32f7_gpio.c | 1 - 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-stm32/gpio.h b/arch/arm/include/asm/arch-stm32/gpio.h index 8ba15b735596..570e80a6ba80 100644 --- a/arch/arm/include/asm/arch-stm32/gpio.h +++ b/arch/arm/include/asm/arch-stm32/gpio.h @@ -7,6 +7,8 @@ #ifndef _GPIO_H_ #define _GPIO_H_ +#define STM32_GPIOS_PER_BANK 16 + enum stm32_gpio_port { STM32_GPIO_PORT_A = 0, STM32_GPIO_PORT_B, diff --git a/arch/arm/mach-stm32mp/include/mach/gpio.h b/arch/arm/mach-stm32mp/include/mach/gpio.h index 46bef21f79f3..5ca76d21ff1e 100644 --- a/arch/arm/mach-stm32mp/include/mach/gpio.h +++ b/arch/arm/mach-stm32mp/include/mach/gpio.h @@ -8,6 +8,8 @@ #define _STM32_GPIO_H_ #include +#define STM32_GPIOS_PER_BANK 16 + enum stm32_gpio_port { STM32_GPIO_PORT_A = 0, STM32_GPIO_PORT_B, diff --git a/drivers/gpio/stm32f7_gpio.c b/drivers/gpio/stm32f7_gpio.c index 55553c9477ff..34cdafa1e402 100644 --- a/drivers/gpio/stm32f7_gpio.c +++ b/drivers/gpio/stm32f7_gpio.c @@ -15,7 +15,6 @@ #include #include -#define STM32_GPIOS_PER_BANK 16 #define MODE_BITS(gpio_pin) (gpio_pin * 2) #define MODE_BITS_MASK 3 #define BSRR_BIT(gpio_pin, value) BIT(gpio_pin + (value ? 0 : 16))