diff mbox series

[U-Boot] imx: imx6: perform gpr_init only on suitable cpu types

Message ID 1539963654-23947-1-git-send-email-cniedermaier@dh-electronics.de
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show
Series [U-Boot] imx: imx6: perform gpr_init only on suitable cpu types | expand

Commit Message

cniedermaier@dh-electronics.de Oct. 19, 2018, 3:40 p.m. UTC 
From: Christoph Niedermaier <cniedermaier@dh-electronics.de>

If the function gpr_init is used in a common MX6 spl
implementation we have to ensure that it is only called for
suitable cpu types, otherwise it breaks hardware parts like
enet1, can1, can2, etc.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.de>
---
 arch/arm/mach-imx/mx6/soc.c | 8 ++++++++
 1 file changed, 8 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index 31c9a6e..e80f1d4 100644
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
@@ -660,6 +660,14 @@  void gpr_init(void)
 {
 	struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
 
+	/*
+	 * If this function is used in a common MX6 spl implementation
+	 * we have to ensure that it is only called for suitable cpu types,
+	 * otherwise it breaks hardware parts like enet1, can1, can2, etc.
+	 */
+	if (!is_mx6dqp() && !is_mx6dq() && !is_mx6sdl())
+		return;
+
 	/* enable AXI cache for VDOA/VPU/IPU */
 	writel(0xF00000CF, &iomux->gpr[4]);
 	if (is_mx6dqp()) {