From patchwork Tue Jul 3 09:48:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 938562 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="nk6p4oUi"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41KfNX4tNmz9s29 for ; Tue, 3 Jul 2018 19:44:44 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 4E264C21EE7; Tue, 3 Jul 2018 09:44:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 41E86C21EA7; Tue, 3 Jul 2018 09:43:55 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 138B0C21D4A; Tue, 3 Jul 2018 09:43:54 +0000 (UTC) Received: from mail-pf0-f194.google.com (mail-pf0-f194.google.com [209.85.192.194]) by lists.denx.de (Postfix) with ESMTPS id 7B8C3C21C93 for ; Tue, 3 Jul 2018 09:43:53 +0000 (UTC) Received: by mail-pf0-f194.google.com with SMTP id j17-v6so751685pfn.5 for ; Tue, 03 Jul 2018 02:43:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references; bh=Z+PAmIKXwQI6TwoJeVWKihcmurOydItHVXdqctlAB1I=; b=nk6p4oUiJX5pMX38KycroD2hKvAIaB2C1w/Vi0ZuH9+2wMZvwNo3Wh4M26vw6N2p5u Ogzd+UYabKMDl4dDeY1bfp59GMe62U9pF6Ktdo2FbDu42GhYhDYOm1INPoCviw28JXjV g8rastfHvzqT+VxICYl+nl4LUyORk+2q7mCRTaX5tVEj48fcExAi2JYcbJ/c98McJR2H L4WyKG5Q0yd7G5KE2hGR+fUEu5EeBSui3MVw4npQYSuVuy9MUCbrgjCzyiV3/7YZuds6 /3+aYZydh5B8083dlLHW4zJWIbuH2+xrZLAovxA/Ki16WXBccXQzmWe1+f/imlTz9Qi5 5eLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=Z+PAmIKXwQI6TwoJeVWKihcmurOydItHVXdqctlAB1I=; b=Ghbdo2c7IGLfO6B0H3v2YfY1N7PDOBIbx1DEG4Di8ITZY9XXcz326cRT8esG+zo2LA aF9alpXs+cOOLouRgORwm9/D05FSI3F14/arYF3MIHFHgJNeloQrLf9tbm/CnoUCgGgD WvKMceCZF9pqUDY+zKcoYkFy0jKo4eyif8KqXXxT6tMvC6A1/pyCAEv9cw6MV7mVS0QW OcAqglwliv3idUv6vGZtp/1XMA/wVnTQFDIRK5y19Ly6g/h2xc7YpTsWxplCf9n2axB7 dmX+jSWAppIiUklPYMeLlE4j1ZvK0v7pF978MNbjq5By2yxg+w5pOkykEUcgWDLTa+Ep DY2g== X-Gm-Message-State: APt69E2HSCcA/Y2/31yf7u7U8YFulttRBPbue5G3uA8ejCY6d5iABPQr lJryiO0xuD8t6HBVgCGKKX8= X-Google-Smtp-Source: ADUXVKJsvgh7376jVsu7Zy6SRT7bh6wPNP4cmZKVRfPZLV9V3qwOwNEKDx5/kfrc+PLehHp8qjjLcA== X-Received: by 2002:a63:b505:: with SMTP id y5-v6mr25450484pge.213.1530611032238; Tue, 03 Jul 2018 02:43:52 -0700 (PDT) Received: from ala-d2121-lx1.wrs.com (unknown-156-139.windriver.com. [147.11.156.139]) by smtp.gmail.com with ESMTPSA id d18-v6sm1721593pfn.118.2018.07.03.02.43.50 (version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 03 Jul 2018 02:43:51 -0700 (PDT) From: Bin Meng To: Simon Glass , Stefan Roese , George McCollister , Andy Shevchenko , U-Boot Mailing List Date: Tue, 3 Jul 2018 02:48:40 -0700 Message-Id: <1530611322-20965-2-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1530611322-20965-1-git-send-email-bmeng.cn@gmail.com> References: <1530611322-20965-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [PATCH 2/4] dm: sysreset: x86: Add a sysreset driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This adds a generic reset driver for x86 processor. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- drivers/sysreset/Kconfig | 6 +++++ drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_x86.c | 49 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+) create mode 100644 drivers/sysreset/sysreset_x86.c diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index a6d48e8..2afeadc 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -37,4 +37,10 @@ config SYSRESET_WATCHDOG help Reboot support for generic watchdog reset. +config SYSRESET_X86 + bool "Enable support for x86 processor reboot driver" + depends on X86 + help + Reboot support for generic x86 processor reset. + endmenu diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index 0da58a1..0eb0dc7 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_SYSRESET) += sysreset-uclass.o obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o +obj-$(CONFIG_SYSRESET_X86) += sysreset_x86.o obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o obj-$(CONFIG_ARCH_STI) += sysreset_sti.o diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c new file mode 100644 index 0000000..5943a63 --- /dev/null +++ b/drivers/sysreset/sysreset_x86.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018, Bin Meng + * + * Generic reset driver for x86 processor + */ + +#include +#include +#include +#include +#include + +static int x86_sysreset_request(struct udevice *dev, enum sysreset_t type) +{ + int value; + + switch (type) { + case SYSRESET_WARM: + value = SYS_RST | RST_CPU; + break; + case SYSRESET_COLD: + value = SYS_RST | RST_CPU | FULL_RST; + break; + default: + return -ENOSYS; + } + + outb(value, IO_PORT_RESET); + + return -EINPROGRESS; +} + +static const struct udevice_id x86_sysreset_ids[] = { + { .compatible = "x86,reset" }, + { } +}; + +static struct sysreset_ops x86_sysreset_ops = { + .request = x86_sysreset_request, +}; + +U_BOOT_DRIVER(x86_sysreset) = { + .name = "x86-sysreset", + .id = UCLASS_SYSRESET, + .of_match = x86_sysreset_ids, + .ops = &x86_sysreset_ops, + .flags = DM_FLAG_PRE_RELOC, +};