| Message ID | 1527604391-17568-2-git-send-email-siva.durga.paladugu@xilinx.com |
|---|---|
| State | Accepted |
| Delegated to: | Michal Simek |
| Headers | show |
| Series | [U-Boot,v2,1/2] mmc: sdhci: Update sdhci_send_command() to handle HS200 | expand |
On 29.5.2018 16:33, Siva Durga Prasad Paladugu wrote: > This patch adds HS200 suuport for ZynqMP and enables > the same for ZC1751 DC1 board which has eMMC on it. > > Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> > --- > Changes from v1: > - Fixed coding style as per comment > --- > configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 + > drivers/mmc/zynq_sdhci.c | 25 ++++++++++++++++-------- > 2 files changed, 18 insertions(+), 8 deletions(-) > > diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig > index f5a3334..96abf61 100644 > --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig > +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig > @@ -54,6 +54,7 @@ CONFIG_DM_I2C=y > CONFIG_SYS_I2C_CADENCE=y > CONFIG_MISC=y > CONFIG_DM_MMC=y > +CONFIG_MMC_HS200_SUPPORT=y > CONFIG_MMC_SDHCI=y > CONFIG_MMC_SDHCI_ZYNQ=y > CONFIG_SPI_FLASH=y > diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c > index f99731f..ea5af47 100644 > --- a/drivers/mmc/zynq_sdhci.c > +++ b/drivers/mmc/zynq_sdhci.c > @@ -32,12 +32,21 @@ struct arasan_sdhci_priv { > }; > > #if defined(CONFIG_ARCH_ZYNQMP) > +#define MMC_HS200_BUS_SPEED 5 > + > static const u8 mode2timing[] = { > - [UHS_SDR12] = UHS_SDR12_BUS_SPEED, > - [UHS_SDR25] = UHS_SDR25_BUS_SPEED, > - [UHS_SDR50] = UHS_SDR50_BUS_SPEED, > - [UHS_SDR104] = UHS_SDR104_BUS_SPEED, > - [UHS_DDR50] = UHS_DDR50_BUS_SPEED, > + [MMC_LEGACY] = UHS_SDR12_BUS_SPEED, > + [SD_LEGACY] = UHS_SDR12_BUS_SPEED, > + [MMC_HS] = HIGH_SPEED_BUS_SPEED, > + [SD_HS] = HIGH_SPEED_BUS_SPEED, > + [MMC_HS_52] = HIGH_SPEED_BUS_SPEED, > + [MMC_DDR_52] = HIGH_SPEED_BUS_SPEED, > + [UHS_SDR12] = UHS_SDR12_BUS_SPEED, > + [UHS_SDR25] = UHS_SDR25_BUS_SPEED, > + [UHS_SDR50] = UHS_SDR50_BUS_SPEED, > + [UHS_DDR50] = UHS_DDR50_BUS_SPEED, > + [UHS_SDR104] = UHS_SDR104_BUS_SPEED, > + [MMC_HS_200] = MMC_HS200_BUS_SPEED, > }; > > #define SDHCI_HOST_CTRL2 0x3E > @@ -160,9 +169,6 @@ static void arasan_sdhci_set_tapdelay(struct sdhci_host *host) > struct mmc *mmc = (struct mmc *)host->mmc; > u8 uhsmode; > > - if (!IS_SD(mmc)) > - return; > - > uhsmode = mode2timing[mmc->selected_mode]; > > if (uhsmode >= UHS_SDR25_BUS_SPEED) > @@ -175,6 +181,9 @@ static void arasan_sdhci_set_control_reg(struct sdhci_host *host) > struct mmc *mmc = (struct mmc *)host->mmc; > u32 reg; > > + if (!IS_SD(mmc)) > + return; > + > if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { > reg = sdhci_readw(host, SDHCI_HOST_CTRL2); > reg |= SDHCI_18V_SIGNAL; > Applied. Thanks, Michal
diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index f5a3334..96abf61 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -54,6 +54,7 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y CONFIG_MISC=y CONFIG_DM_MMC=y +CONFIG_MMC_HS200_SUPPORT=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index f99731f..ea5af47 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -32,12 +32,21 @@ struct arasan_sdhci_priv { }; #if defined(CONFIG_ARCH_ZYNQMP) +#define MMC_HS200_BUS_SPEED 5 + static const u8 mode2timing[] = { - [UHS_SDR12] = UHS_SDR12_BUS_SPEED, - [UHS_SDR25] = UHS_SDR25_BUS_SPEED, - [UHS_SDR50] = UHS_SDR50_BUS_SPEED, - [UHS_SDR104] = UHS_SDR104_BUS_SPEED, - [UHS_DDR50] = UHS_DDR50_BUS_SPEED, + [MMC_LEGACY] = UHS_SDR12_BUS_SPEED, + [SD_LEGACY] = UHS_SDR12_BUS_SPEED, + [MMC_HS] = HIGH_SPEED_BUS_SPEED, + [SD_HS] = HIGH_SPEED_BUS_SPEED, + [MMC_HS_52] = HIGH_SPEED_BUS_SPEED, + [MMC_DDR_52] = HIGH_SPEED_BUS_SPEED, + [UHS_SDR12] = UHS_SDR12_BUS_SPEED, + [UHS_SDR25] = UHS_SDR25_BUS_SPEED, + [UHS_SDR50] = UHS_SDR50_BUS_SPEED, + [UHS_DDR50] = UHS_DDR50_BUS_SPEED, + [UHS_SDR104] = UHS_SDR104_BUS_SPEED, + [MMC_HS_200] = MMC_HS200_BUS_SPEED, }; #define SDHCI_HOST_CTRL2 0x3E @@ -160,9 +169,6 @@ static void arasan_sdhci_set_tapdelay(struct sdhci_host *host) struct mmc *mmc = (struct mmc *)host->mmc; u8 uhsmode; - if (!IS_SD(mmc)) - return; - uhsmode = mode2timing[mmc->selected_mode]; if (uhsmode >= UHS_SDR25_BUS_SPEED) @@ -175,6 +181,9 @@ static void arasan_sdhci_set_control_reg(struct sdhci_host *host) struct mmc *mmc = (struct mmc *)host->mmc; u32 reg; + if (!IS_SD(mmc)) + return; + if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { reg = sdhci_readw(host, SDHCI_HOST_CTRL2); reg |= SDHCI_18V_SIGNAL;
This patch adds HS200 suuport for ZynqMP and enables the same for ZC1751 DC1 board which has eMMC on it. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> --- Changes from v1: - Fixed coding style as per comment --- configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 + drivers/mmc/zynq_sdhci.c | 25 ++++++++++++++++-------- 2 files changed, 18 insertions(+), 8 deletions(-) -- 2.7.4 This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.