From patchwork Tue May 29 12:42:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Jacques Hiblot X-Patchwork-Id: 922060 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="u4KEwGkX"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40wD335mXLz9s0y for ; Tue, 29 May 2018 22:45:19 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 6AE67C21E75; Tue, 29 May 2018 12:44:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id EC2FDC21E96; Tue, 29 May 2018 12:43:17 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2D612C21E74; Tue, 29 May 2018 12:42:50 +0000 (UTC) Received: from fllnx209.ext.ti.com (fllnx209.ext.ti.com [198.47.19.16]) by lists.denx.de (Postfix) with ESMTPS id BC522C21E70 for ; Tue, 29 May 2018 12:42:45 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4TCgggQ010729; Tue, 29 May 2018 07:42:42 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1527597762; bh=56eR1oWs11gliKKoo5VRgu2OEDOlUkItQ5zh4jhCoN4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=u4KEwGkXgCYiZHwCUmJ8Z+a/gA+ojloB/Qby6EdUQbKfBgTZw3g/bZCtL6eHn1ZgF oLFZv7Eh8gZnt+Q+nzleF5JAV5UDAXBsfHpvQeDn0McGVhfEVurokFC6O7IxmnH/lx 0qv3P1oWayLpk7n6e6A5jedML+9gH/uB0jXHYaEk= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4TCggo6025791; Tue, 29 May 2018 07:42:42 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 29 May 2018 07:42:42 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 29 May 2018 07:42:42 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4TCgfZ0013663; Tue, 29 May 2018 07:42:41 -0500 From: Jean-Jacques Hiblot To: , Date: Tue, 29 May 2018 14:42:10 +0200 Message-ID: <1527597737-28751-5-git-send-email-jjhiblot@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527597737-28751-1-git-send-email-jjhiblot@ti.com> References: <1527597737-28751-1-git-send-email-jjhiblot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: Michal Simek , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v7 04/11] dwc3-generic: Add support for the TI DWC3 glue X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Signed-off-by: Jean-Jacques Hiblot --- Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/usb/dwc3/dwc3-generic.c | 85 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index 169188c..b487f72 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -120,6 +120,90 @@ struct dwc3_glue_ops { enum usb_dr_mode mode); }; +void dwc3_ti_select_dr_mode(struct udevice *dev, int index, + enum usb_dr_mode mode) +{ +#define USBOTGSS_UTMI_OTG_STATUS 0x0084 +#define USBOTGSS_UTMI_OTG_OFFSET 0x0480 + +/* UTMI_OTG_STATUS REGISTER */ +#define USBOTGSS_UTMI_OTG_STATUS_SW_MODE BIT(31) +#define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT BIT(9) +#define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE BIT(8) +#define USBOTGSS_UTMI_OTG_STATUS_IDDIG BIT(4) +#define USBOTGSS_UTMI_OTG_STATUS_SESSEND BIT(3) +#define USBOTGSS_UTMI_OTG_STATUS_SESSVALID BIT(2) +#define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID BIT(1) +enum dwc3_omap_utmi_mode { + DWC3_OMAP_UTMI_MODE_UNKNOWN = 0, + DWC3_OMAP_UTMI_MODE_HW, + DWC3_OMAP_UTMI_MODE_SW, +}; + + u32 use_id_pin; + u32 host_mode; + u32 reg; + u32 utmi_mode; + u32 utmi_status_offset = USBOTGSS_UTMI_OTG_STATUS; + + struct dwc3_glue_data *glue = dev_get_platdata(dev); + void *base = map_physmem(glue->regs, 0x10000, MAP_NOCACHE); + + if (device_is_compatible(dev, "ti,am437x-dwc3")) + utmi_status_offset += USBOTGSS_UTMI_OTG_OFFSET; + + utmi_mode = dev_read_u32_default(dev, "utmi-mode", + DWC3_OMAP_UTMI_MODE_UNKNOWN); + if (utmi_mode != DWC3_OMAP_UTMI_MODE_HW) { + debug("%s: OTG is not supported. defaulting to PERIPHERAL\n", + dev->name); + mode = USB_DR_MODE_PERIPHERAL; + } + + switch (mode) { + case USB_DR_MODE_PERIPHERAL: + use_id_pin = 0; + host_mode = 0; + break; + case USB_DR_MODE_HOST: + use_id_pin = 0; + host_mode = 1; + break; + case USB_DR_MODE_OTG: + default: + use_id_pin = 1; + host_mode = 0; + break; + } + + reg = readl(base + utmi_status_offset); + + reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SW_MODE); + if (!use_id_pin) + reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE; + + writel(reg, base + utmi_status_offset); + + reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SESSEND | + USBOTGSS_UTMI_OTG_STATUS_VBUSVALID | + USBOTGSS_UTMI_OTG_STATUS_IDDIG); + + reg |= USBOTGSS_UTMI_OTG_STATUS_SESSVALID | + USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT; + + if (!host_mode) + reg |= USBOTGSS_UTMI_OTG_STATUS_IDDIG | + USBOTGSS_UTMI_OTG_STATUS_VBUSVALID; + + writel(reg, base + utmi_status_offset); + + unmap_physmem(base, MAP_NOCACHE); +} + +struct dwc3_glue_ops ti_ops = { + .select_dr_mode = dwc3_ti_select_dr_mode, +}; + static int dwc3_glue_bind(struct udevice *parent) { const void *fdt = gd->fdt_blob; @@ -259,6 +343,7 @@ static int dwc3_glue_remove(struct udevice *dev) static const struct udevice_id dwc3_glue_ids[] = { { .compatible = "xlnx,zynqmp-dwc3" }, + { .compatible = "ti,dwc3", .data = (ulong)&ti_ops }, { } };