From patchwork Fri May 25 02:06:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ken Ma X-Patchwork-Id: 920172 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=marvell.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40sVFf3KMGz9s0q for ; Fri, 25 May 2018 12:15:01 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 776CFC21DCA; Fri, 25 May 2018 02:14:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 16398C21C2C; Fri, 25 May 2018 02:14:57 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 70E75C21C27; Fri, 25 May 2018 02:14:56 +0000 (UTC) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lists.denx.de (Postfix) with ESMTPS id C6659C21BE5 for ; Fri, 25 May 2018 02:14:55 +0000 (UTC) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w4P2Eat6005491; Thu, 24 May 2018 19:14:49 -0700 Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 2j2h9k3sw1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 24 May 2018 19:14:49 -0700 Received: from SC-EXCH02.marvell.com (10.93.176.82) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Thu, 24 May 2018 19:14:48 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Thu, 24 May 2018 19:14:47 -0700 Received: from mshsrv05.marvell.com (unknown [10.38.120.46]) by maili.marvell.com (Postfix) with ESMTP id 9748A3F703F; Thu, 24 May 2018 19:14:46 -0700 (PDT) From: To: U-Boot Mailing List Date: Fri, 25 May 2018 10:06:33 +0800 Message-ID: <1527213995-10468-3-git-send-email-make@marvell.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1527213995-10468-1-git-send-email-make@marvell.com> References: <1527213995-10468-1-git-send-email-make@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-05-24_08:, , signatures=0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1711220000 definitions=main-1805250025 Cc: David Sniatkiwicz , Prafulla Wadaskar , Luka Perkov , Ken Ma , Stefan Roese Subject: [U-Boot] [PATCH v3 2/4] ata: ahci_mvebu: a8040 a0: remove bad port register offsets workarounds X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: David Sniatkiwicz This workaround was added for A8040/7040 A0. A8040/7040 A0 is no longer supported so this workaround can be removed. Signed-off-by: David Sniatkiwicz Signed-off-by: Ken Ma Reviewed-by: Stefan Roese Reviewed-by: Simon Glass --- Changes in v3: None drivers/ata/ahci_mvebu.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c index 3ae8dae..c1d215f 100644 --- a/drivers/ata/ahci_mvebu.c +++ b/drivers/ata/ahci_mvebu.c @@ -16,14 +16,6 @@ __weak int board_ahci_enable(void) return 0; } -#ifdef CONFIG_ARMADA_8K -/* CP110 has different AHCI port addresses */ -void __iomem *ahci_port_base(void __iomem *base, u32 port) -{ - return base + 0x10000 + (port * 0x10000); -} -#endif - static int mvebu_ahci_probe(struct udevice *dev) { /*