From patchwork Thu Mar 15 10:39:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "J, KEERTHY" X-Patchwork-Id: 886177 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="ufwgg7Mw"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 4024tQ4bL6z9sVd for ; Thu, 15 Mar 2018 21:42:54 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id F0D52C21E0D; Thu, 15 Mar 2018 10:42:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id D80D6C21E07; Thu, 15 Mar 2018 10:41:54 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id BA9CDC21DCA; Thu, 15 Mar 2018 10:41:42 +0000 (UTC) Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by lists.denx.de (Postfix) with ESMTPS id E23C6C21DD4 for ; Thu, 15 Mar 2018 10:41:38 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w2FAfbPi005635; Thu, 15 Mar 2018 05:41:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1521110497; bh=RgTgAkG74gy1S4NbSnzyFVOYhWzlSamvHDWflsejH0M=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ufwgg7MwnRzbEDM1BNUN63ku3gD1cIBxKO6TFHewTqSv3lWt3Hlxbu1Rgm4ffeE6N a+Kk4AlISFo7PwMTF06FptPC9bFYEua9uK8vQmMnx0dpSy/vjg5U3zhq/oHyNAG3fv VsfDBX1krwXLQJxUhlE97o3+SSiUD/AGzcM63GCM= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w2FAfbYf025111; Thu, 15 Mar 2018 05:41:37 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Thu, 15 Mar 2018 05:41:36 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Thu, 15 Mar 2018 05:41:37 -0500 Received: from ula0393675.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w2FAfUru010264; Thu, 15 Mar 2018 05:41:35 -0500 From: Keerthy To: Date: Thu, 15 Mar 2018 16:09:53 +0530 Message-ID: <1521110393-31244-3-git-send-email-j-keerthy@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1521110393-31244-1-git-send-email-j-keerthy@ti.com> References: <1521110393-31244-1-git-send-email-j-keerthy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: t-kristo@ti.com, u-boot@lists.denx.de, d-gerlach@ti.com Subject: [U-Boot] [PATCH 2/2] am43xx: Do not allow EMIF to control DDR_RESET in rtconly config X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Dave Gerlach Prevent EMIF control of DDR_RESET line on DDR3 am43xx platforms for am43xx_evm_rtconly_config. Without this DDR is unstable and can become corrupted after multiple iterations of RTC+DDR mode. Signed-off-by: Dave Gerlach [j-keerthy@ti.com Ported to latest master branch] Signed-off-by: Keerthy Reviewed-by: Tom Rini --- arch/arm/mach-omap2/am33xx/emif4.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-omap2/am33xx/emif4.c b/arch/arm/mach-omap2/am33xx/emif4.c index 68c7705..54e11d3 100644 --- a/arch/arm/mach-omap2/am33xx/emif4.c +++ b/arch/arm/mach-omap2/am33xx/emif4.c @@ -95,8 +95,13 @@ void config_ddr(unsigned int pll, const struct ctrl_ioregs *ioregs, writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); if (emif_sdram_type(regs->sdram_config) == EMIF_SDRAM_TYPE_DDR3) +#ifndef CONFIG_SPL_RTC_ONLY_SUPPORT /* Allow EMIF to control DDR_RESET */ writel(0x00000000, &ddrctrl->ddrioctrl); +#else + /* Override EMIF DDR_RESET control */ + writel(0x80000000, &ddrctrl->ddrioctrl); +#endif /* CONFIG_SPL_RTC_ONLY_SUPPORT */ #endif /* Program EMIF instance */