From patchwork Fri Feb 23 09:40:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Jacques Hiblot X-Patchwork-Id: 876997 X-Patchwork-Delegate: jh80.chung@samsung.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="GsgsYlCY"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3znmSS1pJJz9sWK for ; Fri, 23 Feb 2018 20:41:12 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id E3041C21FAF; Fri, 23 Feb 2018 09:40:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 844A8C21FB0; Fri, 23 Feb 2018 09:40:30 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 8C5FBC21D72; Fri, 23 Feb 2018 09:40:27 +0000 (UTC) Received: from fllnx210.ext.ti.com (fllnx210.ext.ti.com [198.47.19.17]) by lists.denx.de (Postfix) with ESMTPS id D73A3C21E73 for ; Fri, 23 Feb 2018 09:40:26 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w1N9eOCV011669; Fri, 23 Feb 2018 03:40:24 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1519378824; bh=7hiM5W7bLLbp4c94GVtic3Zq92MorMgup1BzKgHHbE0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=GsgsYlCYbzKxEg/cKAiz7ILAj9VGN3+1jum+7JlFcTfUpyyNKKyPg1nUaSPqSpdoX 84rNn9QXaAR9umWsd2N7Q28JTNckYaihMebjcNKEeExoNLBq0uiEBV6MflA7aPnkU7 0PGrbS/M3G1RSgZsKFNXDzsKn6eyd/MuK3ETYNLE= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1N9eO5l009808; Fri, 23 Feb 2018 03:40:24 -0600 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 23 Feb 2018 03:40:24 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 23 Feb 2018 03:40:23 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1N9eN3L004260; Fri, 23 Feb 2018 03:40:23 -0600 From: Jean-Jacques Hiblot To: , Date: Fri, 23 Feb 2018 10:40:18 +0100 Message-ID: <1519378819-19867-4-git-send-email-jjhiblot@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1519378819-19867-1-git-send-email-jjhiblot@ti.com> References: <1519378819-19867-1-git-send-email-jjhiblot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v2 3/4] mmc: omap_hsmmc: make it possible to compile out ADMA support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Some platforms don't have ADMA controllers. For those platforms, compiling it out reduces the size of the binary by about 600 bytes. Leaving the support in doesn't break things as the driver checks at runtime if the ADMA2 controller is present. Signed-off-by: Jean-Jacques Hiblot Reviewed-by: Tom Rini --- Changes in v2: - Use a Kconfig option to compile out the ADMA support instead of relying on the platform architecture drivers/mmc/Kconfig | 9 +++++++++ drivers/mmc/omap_hsmmc.c | 12 ++++++------ 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index f2d8256..88a1359 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -239,6 +239,15 @@ config MMC_OMAP_HS If unsure, say N. +config MMC_OMAP_HS_ADMA + bool "ADMA support for OMAP HS MMC" + depends on MMC_OMAP_HS && !OMAP34XX + default y if !AM33XX + help + This enables support for the ADMA2 controller (SDA3.00 Part A2 DMA + controller). If supported by the hardware, selecting this option will + increase performances. + config MMC_OMAP36XX_PINS bool "Enable MMC1 on OMAP36xx/37xx" depends on OMAP34XX && MMC_OMAP_HS diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index 8b57edc..3d2836d 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -93,7 +93,7 @@ struct omap_hsmmc_data { enum bus_mode mode; #endif u8 controller_flags; -#ifndef CONFIG_OMAP34XX +#ifdef CONFIG_MMC_OMAP_HS_ADMA struct omap_hsmmc_adma_desc *adma_desc_table; uint desc_slot; #endif @@ -117,7 +117,7 @@ struct omap_mmc_of_data { u8 controller_flags; }; -#ifndef CONFIG_OMAP34XX +#ifdef CONFIG_MMC_OMAP_HS_ADMA struct omap_hsmmc_adma_desc { u8 attr; u8 reserved; @@ -741,7 +741,7 @@ static int omap_hsmmc_init_setup(struct mmc *mmc) return -ETIMEDOUT; } } -#ifndef CONFIG_OMAP34XX +#ifdef CONFIG_MMC_OMAP_HS_ADMA reg_val = readl(&mmc_base->hl_hwinfo); if (reg_val & MADMA_EN) priv->controller_flags |= OMAP_HSMMC_USE_ADMA; @@ -834,7 +834,7 @@ static void mmc_reset_controller_fsm(struct hsmmc *mmc_base, u32 bit) } } -#ifndef CONFIG_OMAP34XX +#ifdef CONFIG_MMC_OMAP_HS_ADMA static void omap_hsmmc_adma_desc(struct mmc *mmc, char *buf, u16 len, bool end) { struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); @@ -1037,7 +1037,7 @@ static int omap_hsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, else flags |= (DP_DATA | DDIR_WRITE); -#ifndef CONFIG_OMAP34XX +#ifdef CONFIG_MMC_OMAP_HS_ADMA if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) && !mmc_is_tuning_cmd(cmd->cmdidx)) { omap_hsmmc_prepare_data(mmc, data); @@ -1082,7 +1082,7 @@ static int omap_hsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, } } -#ifndef CONFIG_OMAP34XX +#ifdef CONFIG_MMC_OMAP_HS_ADMA if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) && data && !mmc_is_tuning_cmd(cmd->cmdidx)) { u32 sz_mb, timeout;