From patchwork Thu Feb 8 16:20:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 870938 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zckCH43dtz9s72 for ; Fri, 9 Feb 2018 03:28:27 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 1E56FC21ED5; Thu, 8 Feb 2018 16:23:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BB55BC21EA6; Thu, 8 Feb 2018 16:23:02 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3B11EC21E8A; Thu, 8 Feb 2018 16:21:41 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id 03323C21EBE for ; Thu, 8 Feb 2018 16:21:36 +0000 (UTC) Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w18GJckQ005361; Thu, 8 Feb 2018 17:21:36 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2fw3qx399j-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 08 Feb 2018 17:21:36 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7965D38; Thu, 8 Feb 2018 16:21:35 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 68291A6F7; Thu, 8 Feb 2018 16:21:35 +0000 (GMT) Received: from localhost (10.75.127.48) by SFHDAG6NODE3.st.com (10.75.127.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 8 Feb 2018 17:21:35 +0100 From: To: , , , Date: Thu, 8 Feb 2018 17:20:51 +0100 Message-ID: <1518106851-18106-8-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1518106851-18106-1-git-send-email-patrice.chotard@st.com> References: <1518106851-18106-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG2NODE1.st.com (10.75.127.4) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-08_08:, , signatures=0 Subject: [U-Boot] [PATCH 7/7] clk: clk_stm32f: Add DSI clock support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Patrice Chotard DSI clock is available on STM32F769-disco and STM32F469-disco board. Signed-off-by: Yannick Fertre Signed-off-by: Patrice Chotard --- drivers/clk/clk_stm32f.c | 2 +- include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c index a683911ebf00..d8eab1a88d7c 100644 --- a/drivers/clk/clk_stm32f.c +++ b/drivers/clk/clk_stm32f.c @@ -432,7 +432,7 @@ static ulong stm32_clk_get_rate(struct clk *clk) return (sysclk >> stm32_get_apb_shift(regs, APB1)); /* APB2 CLOCK */ - case STM32F7_APB2_CLOCK(TIM1) ... STM32F7_APB2_CLOCK(LTDC): + case STM32F7_APB2_CLOCK(TIM1) ... STM32F7_APB2_CLOCK(DSI): switch (clk->id) { /* * particular case for SDMMC1 and SDMMC2 : diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h b/include/dt-bindings/mfd/stm32f7-rcc.h index 44c091449381..c9087f5f3dac 100644 --- a/include/dt-bindings/mfd/stm32f7-rcc.h +++ b/include/dt-bindings/mfd/stm32f7-rcc.h @@ -106,6 +106,7 @@ #define STM32F7_RCC_APB2_SAI1 22 #define STM32F7_RCC_APB2_SAI2 23 #define STM32F7_RCC_APB2_LTDC 26 +#define STM32F7_RCC_APB2_DSI 27 #define STM32F7_APB2_RESET(bit) (STM32F7_RCC_APB2_##bit + (0x24 * 8)) #define STM32F7_APB2_CLOCK(bit) (STM32F7_RCC_APB2_##bit + 0xA0)