diff mbox series

[U-Boot,7/7] clk: clk_stm32f: Add DSI clock support

Message ID 1518106851-18106-8-git-send-email-patrice.chotard@st.com
State Accepted
Commit 6243c884485182d7dd949c8ef1965d71593c9e4d
Delegated to: Tom Rini
Headers show
Series clk: clk_stm32f: update and fixes | expand

Commit Message

Patrice CHOTARD Feb. 8, 2018, 4:20 p.m. UTC 
From: Patrice Chotard <patrice.chotard@st.com>

DSI clock is available on STM32F769-disco and
STM32F469-disco board.

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
 drivers/clk/clk_stm32f.c              | 2 +-
 include/dt-bindings/mfd/stm32f7-rcc.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

Comments

Tom Rini March 14, 2018, 2:08 p.m. UTC | #1 
On Thu, Feb 08, 2018 at 05:20:51PM +0100, patrice.chotard@st.com wrote:

> From: Patrice Chotard <patrice.chotard@st.com>
> 
> DSI clock is available on STM32F769-disco and
> STM32F469-disco board.
> 
> Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Applied to u-boot/master, thanks!
diff mbox series

Patch

diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
index a683911ebf00..d8eab1a88d7c 100644
--- a/drivers/clk/clk_stm32f.c
+++ b/drivers/clk/clk_stm32f.c
@@ -432,7 +432,7 @@  static ulong stm32_clk_get_rate(struct clk *clk)
 		return (sysclk >> stm32_get_apb_shift(regs, APB1));
 
 	/* APB2 CLOCK */
-	case STM32F7_APB2_CLOCK(TIM1) ... STM32F7_APB2_CLOCK(LTDC):
+	case STM32F7_APB2_CLOCK(TIM1) ... STM32F7_APB2_CLOCK(DSI):
 		switch (clk->id) {
 		/*
 		 * particular case for SDMMC1 and SDMMC2 :
diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h b/include/dt-bindings/mfd/stm32f7-rcc.h
index 44c091449381..c9087f5f3dac 100644
--- a/include/dt-bindings/mfd/stm32f7-rcc.h
+++ b/include/dt-bindings/mfd/stm32f7-rcc.h
@@ -106,6 +106,7 @@ 
 #define STM32F7_RCC_APB2_SAI1		22
 #define STM32F7_RCC_APB2_SAI2		23
 #define STM32F7_RCC_APB2_LTDC		26
+#define STM32F7_RCC_APB2_DSI		27
 
 #define STM32F7_APB2_RESET(bit)	(STM32F7_RCC_APB2_##bit + (0x24 * 8))
 #define STM32F7_APB2_CLOCK(bit)	(STM32F7_RCC_APB2_##bit + 0xA0)