From patchwork Mon Nov 27 09:59:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Jacques Hiblot X-Patchwork-Id: 841559 X-Patchwork-Delegate: jh80.chung@samsung.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="wIIs0fdq"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3ylj5w69fwz9s9Y for ; Mon, 27 Nov 2017 21:02:44 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 94561C21DA1; Mon, 27 Nov 2017 10:00:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id AC5B0C21D76; Mon, 27 Nov 2017 10:00:13 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 9D86DC21D95; Mon, 27 Nov 2017 09:59:32 +0000 (UTC) Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by lists.denx.de (Postfix) with ESMTPS id 0F7C6C21DB2 for ; Mon, 27 Nov 2017 09:59:31 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id vAR9xUaZ014568; Mon, 27 Nov 2017 03:59:30 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1511776770; bh=kFVx+aQ2zSYXsfReN1gVzXX3ZquwgPys5T7nRWJU9gQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wIIs0fdqNVYgtb70Zc3lsfGZmlsJFlKTBt6SeCNePOZfFQm6KkXP5UrCEBF4vBfgB ZanHJUy/wrTstVwN+3msYcI8e7Z70ldsGBFo81KbGFX3Y3jhnovxGGIcT/55LP3GQh hLYiLtQg4NHQ9G5LdLJCRoqdsnQBg89Kw/tAb2s0= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vAR9xUoc016050; Mon, 27 Nov 2017 03:59:30 -0600 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Mon, 27 Nov 2017 03:59:29 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Mon, 27 Nov 2017 03:59:29 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id vAR9xTeb001978; Mon, 27 Nov 2017 03:59:29 -0600 From: Jean-Jacques Hiblot To: , , , , , Date: Mon, 27 Nov 2017 10:59:06 +0100 Message-ID: <1511776746-2957-5-git-send-email-jjhiblot@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1511776746-2957-1-git-send-email-jjhiblot@ti.com> References: <1511776746-2957-1-git-send-email-jjhiblot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Subject: [U-Boot] [PATCH v2 4/4] mmc: all hosts support 1-bit bus width and legacy timings X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Make sure that those basic capabilities are advertised by the host. Signed-off-by: Jean-Jacques Hiblot Reviewed-by: Lukasz Majewski Reviewed-by: Simon Glass --- no change since v1 drivers/mmc/mmc.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 67f21ff..ec1dc49 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1587,10 +1587,10 @@ static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps) uint caps; mmc_dump_capabilities("sd card", card_caps); - mmc_dump_capabilities("host", mmc->host_caps | MMC_MODE_1BIT); + mmc_dump_capabilities("host", mmc->host_caps); /* Restrict card's capabilities by what the host can do */ - caps = card_caps & (mmc->host_caps | MMC_MODE_1BIT); + caps = card_caps & mmc->host_caps; if (!uhs_en) caps &= ~UHS_CAPS; @@ -1771,10 +1771,10 @@ static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps) const struct ext_csd_bus_width *ecbw; mmc_dump_capabilities("mmc", card_caps); - mmc_dump_capabilities("host", mmc->host_caps | MMC_MODE_1BIT); + mmc_dump_capabilities("host", mmc->host_caps); /* Restrict card's capabilities by what the host can do */ - card_caps &= (mmc->host_caps | MMC_MODE_1BIT); + card_caps &= mmc->host_caps; /* Only version 4 of MMC supports wider bus widths */ if (mmc->version < MMC_VERSION_4) @@ -2389,7 +2389,12 @@ int mmc_start_init(struct mmc *mmc) bool uhs_en = supports_uhs(mmc->cfg->host_caps); int err; - mmc->host_caps = mmc->cfg->host_caps; + /* + * all hosts are capable of 1 bit bus-width and able to use the legacy + * timings. + */ + mmc->host_caps = mmc->cfg->host_caps | MMC_CAP(SD_LEGACY) | + MMC_CAP(MMC_LEGACY) | MMC_MODE_1BIT; /* we pretend there's no card when init is NULL */ no_card = mmc_getcd(mmc) == 0;