From patchwork Mon Oct 23 08:57:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 829185 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3yL9Nt69r3z9sPk for ; Mon, 23 Oct 2017 20:01:02 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 6DC95C21DBB; Mon, 23 Oct 2017 08:59:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A6482C21DB5; Mon, 23 Oct 2017 08:58:05 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 4FB90C21C2B; Mon, 23 Oct 2017 08:57:52 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id 2E4E3C21D5F for ; Mon, 23 Oct 2017 08:57:49 +0000 (UTC) Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v9N8ro9j012480; Mon, 23 Oct 2017 10:57:48 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2dqupv0efh-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 23 Oct 2017 10:57:48 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1064131; Mon, 23 Oct 2017 08:57:48 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id EE8171500; Mon, 23 Oct 2017 08:57:47 +0000 (GMT) Received: from localhost (10.75.127.50) by SFHDAG6NODE3.st.com (10.75.127.18) with Microsoft SMTP Server (TLS) id 15.0.1178.4; Mon, 23 Oct 2017 10:57:47 +0200 From: To: , , Date: Mon, 23 Oct 2017 10:57:33 +0200 Message-ID: <1508749054-28369-5-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508749054-28369-1-git-send-email-patrice.chotard@st.com> References: <1508749054-28369-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG6NODE1.st.com (10.75.127.16) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-10-23_02:, , signatures=0 Subject: [U-Boot] [PATCH v2 4/5] mmc: arm_pl180_mmci: add clock support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Patrice Chotard Allow to get and enable MMC related clock Signed-off-by: Patrice Chotard --- drivers/mmc/arm_pl180_mmci.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c index fd57b55..3de6b12 100644 --- a/drivers/mmc/arm_pl180_mmci.c +++ b/drivers/mmc/arm_pl180_mmci.c @@ -13,6 +13,7 @@ /* #define DEBUG */ #include "common.h" +#include #include #include #include @@ -408,17 +409,28 @@ static int arm_pl180_mmc_probe(struct udevice *dev) struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct mmc *mmc = &pdata->mmc; struct pl180_mmc_host *host = mmc->priv; + struct clk clk; u32 bus_width; int ret; + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) + return ret; + + ret = clk_enable(&clk); + if (ret) { + dev_err(dev, "failed to enable clock\n"); + return ret; + } + strcpy(host->name, "MMC"); host->pwr_init = INIT_PWR; host->clkdiv_init = SDI_CLKCR_CLKDIV_INIT_V1 | SDI_CLKCR_CLKEN | SDI_CLKCR_HWFC_EN; host->voltages = VOLTAGE_WINDOW_SD; host->caps = 0; - host->clock_in = MMC_CLOCK_MAX; - host->clock_min = MMC_CLOCK_MIN; + host->clock_in = clk_get_rate(&clk); + host->clock_min = host->clock_in / (2 * (SDI_CLKCR_CLKDIV_INIT_V1 + 1)); host->clock_max = dev_read_u32_default(dev, "max-frequency", MMC_CLOCK_MAX); host->version2 = dev_get_driver_data(dev);