From patchwork Fri Aug 4 13:18:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 797805 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3xP70102sWz9sPt for ; Fri, 4 Aug 2017 23:22:56 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id AD4A7C21E4B; Fri, 4 Aug 2017 13:21:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B51D9C21EA2; Fri, 4 Aug 2017 13:19:18 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 34486C21DD7; Fri, 4 Aug 2017 13:19:10 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id 300D1C21DBD for ; Fri, 4 Aug 2017 13:19:06 +0000 (UTC) Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v74DIsBt024627; Fri, 4 Aug 2017 15:19:05 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-.pphosted.com with ESMTP id 2c4qe18tve-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 04 Aug 2017 15:19:05 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B3B1D31; Fri, 4 Aug 2017 13:19:04 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9C42F1506; Fri, 4 Aug 2017 13:19:04 +0000 (GMT) Received: from localhost (10.75.127.46) by SFHDAG6NODE3.st.com (10.75.127.18) with Microsoft SMTP Server (TLS) id 15.0.1178.4; Fri, 4 Aug 2017 15:19:04 +0200 From: To: , , , Date: Fri, 4 Aug 2017 15:18:42 +0200 Message-ID: <1501852726-9472-12-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1501852726-9472-1-git-send-email-patrice.chotard@st.com> References: <1501852726-9472-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG1NODE3.st.com (10.75.127.3) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-08-04_07:, , signatures=0 Subject: [U-Boot] [PATCH 11/15] ARM: DTS: stm32: add HSI and CSI fixed clock for stm32H743 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Patrice Chotard Add missing HSI (High Speed Internal) and CSI (Low Power Internal) oscillators nodes needed by STM32H7 RCC clock driver. These clocks can be used as clocksource in some configuration. Signed-off-by: Patrice Chotard --- arch/arm/dts/stm32h743.dtsi | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/stm32h743.dtsi b/arch/arm/dts/stm32h743.dtsi index ca3faad..16e9308 100644 --- a/arch/arm/dts/stm32h743.dtsi +++ b/arch/arm/dts/stm32h743.dtsi @@ -71,7 +71,7 @@ #reset-cells = <1>; compatible = "st,stm32h743-rcc", "st,stm32-rcc"; reg = <0x58024400 0x400>; - clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>; + clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>, <&clk_hsi>, <&clk_csi>; st,syscfg = <&pwrcfg>; }; @@ -108,6 +108,18 @@ reg = <0x52004000 0x1000>; clocks = <&rcc FMC_CK>; }; + + clk_hsi: clk-hsi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <64000000>; + }; + + clk_csi: clk-csi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <4000000>; + }; }; };