From patchwork Wed Aug 2 20:40:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philipp Tomsich X-Patchwork-Id: 796814 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3xN4zr5KBtz9s7g for ; Thu, 3 Aug 2017 06:49:12 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 623C7C21DF0; Wed, 2 Aug 2017 20:44:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6CCD6C21DE1; Wed, 2 Aug 2017 20:44:09 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E182CC21DE5; Wed, 2 Aug 2017 20:40:31 +0000 (UTC) Received: from mail.theobroma-systems.com (vegas.theobroma-systems.com [144.76.126.164]) by lists.denx.de (Postfix) with ESMTPS id 8B1F9C21DD7 for ; Wed, 2 Aug 2017 20:40:31 +0000 (UTC) Received: from [86.59.122.178] (port=53936 helo=android.lan) by mail.theobroma-systems.com with esmtpsa (TLS1.2:RSA_AES_128_CBC_SHA256:128) (Exim 4.80) (envelope-from ) id 1dd0RR-0002Mj-UE; Wed, 02 Aug 2017 22:40:30 +0200 From: Philipp Tomsich To: u-boot@lists.denx.de Date: Wed, 2 Aug 2017 22:40:02 +0200 Message-Id: <1501706406-10284-7-git-send-email-philipp.tomsich@theobroma-systems.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1501706406-10284-1-git-send-email-philipp.tomsich@theobroma-systems.com> References: <1501706406-10284-1-git-send-email-philipp.tomsich@theobroma-systems.com> Cc: Albert Aribaud , Klaus Goger Subject: [U-Boot] [PATCH v2 6/6] rockchip: rk3368: remove setup of secure timer from TPL/SPL X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" When using DM timers w/ the timer0 block within the RK3368, we no longer depend on the ARMv8 generic timer counting. This allows us to drop the secure timer initialisation from the TPL and SPL stages. The secure timer will later be set up by ATF, which starts the ARMv8 generic timer. Thus, there will be a dependency from Linux to the ATF through the ARMv8 generic timer... this seems reasonable, as Linux will require the ATF (and PSCI) to start up the secondary cores anyway (in other words: we don't add any new dependencies). Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass --- Changes in v2: None arch/arm/mach-rockchip/rk3368-board-spl.c | 20 -------------------- arch/arm/mach-rockchip/rk3368-board-tpl.c | 19 ------------------- 2 files changed, 39 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c index 691db41..cabf344 100644 --- a/arch/arm/mach-rockchip/rk3368-board-spl.c +++ b/arch/arm/mach-rockchip/rk3368-board-spl.c @@ -19,23 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; -/* - * The ARMv8 generic timer uses the STIMER1 as its clock-source. - * Set up the STIMER1 to free-running (i.e. auto-reload) to start - * the generic timer counting (if we don't do this, udelay will not - * work and block indefinitively). - */ -static void secure_timer_init(void) -{ - struct rk_timer * const stimer1 = - (struct rk_timer * const)0xff830020; - const u32 TIMER_EN = BIT(0); - - writel(~0u, &stimer1->timer_load_count0); - writel(~0u, &stimer1->timer_load_count1); - writel(TIMER_EN, &stimer1->timer_ctrl_reg); -} - void board_debug_uart_init(void) { } @@ -52,9 +35,6 @@ void board_init_f(ulong dummy) hang(); } - /* Make sure the ARMv8 generic timer counts */ - secure_timer_init(); - /* Set up our preloader console */ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); if (ret) { diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c index 2a91007..c610cfc 100644 --- a/arch/arm/mach-rockchip/rk3368-board-tpl.c +++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c @@ -21,23 +21,6 @@ DECLARE_GLOBAL_DATA_PTR; /* - * The ARMv8 generic timer uses the STIMER1 as its clock-source. - * Set up the STIMER1 to free-running (i.e. auto-reload) to start - * the generic timer counting (if we don't do this, udelay will not - * work and block indefinitively). - */ -static void secure_timer_init(void) -{ - struct rk_timer * const stimer1 = - (struct rk_timer * const)0xff830020; - const u32 TIMER_EN = BIT(0); - - writel(~0u, &stimer1->timer_load_count0); - writel(~0u, &stimer1->timer_load_count1); - writel(TIMER_EN, &stimer1->timer_ctrl_reg); -} - -/* * The SPL (and also the full U-Boot stage on the RK3368) will run in * secure mode (i.e. EL3) and an ATF will eventually be booted before * starting up the operating system... so we can initialize the SGRF @@ -153,8 +136,6 @@ void board_init_f(ulong dummy) hang(); } - /* Make sure the ARMv8 generic timer counts */ - secure_timer_init(); /* Reset security, so we can use DMA in the MMC drivers */ sgrf_init();