From patchwork Wed Jul 26 10:40:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philipp Tomsich X-Patchwork-Id: 793857 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3xHXVy2Znjz9s3T for ; Wed, 26 Jul 2017 21:11:54 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 1619CC21FA6; Wed, 26 Jul 2017 11:02:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7AC00C21F26; Wed, 26 Jul 2017 10:55:43 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 9EAB8C21F11; Wed, 26 Jul 2017 10:49:28 +0000 (UTC) Received: from mail.theobroma-systems.com (vegas.theobroma-systems.com [144.76.126.164]) by lists.denx.de (Postfix) with ESMTPS id 16F81C21F3D for ; Wed, 26 Jul 2017 10:49:23 +0000 (UTC) Received: from [86.59.122.178] (port=48558 helo=android.lan) by mail.theobroma-systems.com with esmtpsa (TLS1.2:RSA_AES_128_CBC_SHA256:128) (Exim 4.80) (envelope-from ) id 1daJll-0004B3-1q; Wed, 26 Jul 2017 12:42:21 +0200 From: Philipp Tomsich To: u-boot@lists.denx.de Date: Wed, 26 Jul 2017 12:40:55 +0200 Message-Id: <1501065662-52029-52-git-send-email-philipp.tomsich@theobroma-systems.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1501065662-52029-1-git-send-email-philipp.tomsich@theobroma-systems.com> References: <1501065662-52029-1-git-send-email-philipp.tomsich@theobroma-systems.com> Cc: Albert Aribaud , Klaus Goger Subject: [U-Boot] [PATCH v2 51/56] rockchip: rk3368: spl: add SPL support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Adds SPL support for the RK3368 (assuming that our TPL stage has initialised DRAM and set up the memory firewall). Signed-off-by: Philipp Tomsich Reviewed-by: Simon Glass --- Changes in v2: - reuses the support for configuring the boot order using the u-boot,spl-boot-order property - drops the initialisation of the debug_uart - adds pinctrl-configuration for the preloader UART arch/arm/mach-rockchip/Makefile | 2 +- arch/arm/mach-rockchip/rk3368-board-spl.c | 98 +++++++++++++++++++++++++++++++ 2 files changed, 99 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-rockchip/rk3368-board-spl.c diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index c5d17f9..c3ed862 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -18,7 +18,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o -obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o +obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c new file mode 100644 index 0000000..691db41 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3368-board-spl.c @@ -0,0 +1,98 @@ +/* + * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* + * The ARMv8 generic timer uses the STIMER1 as its clock-source. + * Set up the STIMER1 to free-running (i.e. auto-reload) to start + * the generic timer counting (if we don't do this, udelay will not + * work and block indefinitively). + */ +static void secure_timer_init(void) +{ + struct rk_timer * const stimer1 = + (struct rk_timer * const)0xff830020; + const u32 TIMER_EN = BIT(0); + + writel(~0u, &stimer1->timer_load_count0); + writel(~0u, &stimer1->timer_load_count1); + writel(TIMER_EN, &stimer1->timer_ctrl_reg); +} + +void board_debug_uart_init(void) +{ +} + +void board_init_f(ulong dummy) +{ + struct udevice *pinctrl; + struct udevice *dev; + int ret; + + ret = spl_early_init(); + if (ret) { + debug("spl_early_init() failed: %d\n", ret); + hang(); + } + + /* Make sure the ARMv8 generic timer counts */ + secure_timer_init(); + + /* Set up our preloader console */ + ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); + if (ret) { + error("%s: pinctrl init failed: %d\n", __func__, ret); + hang(); + } + + ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART0); + if (ret) { + error("%s: failed to set up console UART\n", __func__); + hang(); + } + + preloader_console_init(); + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { + debug("DRAM init failed: %d\n", ret); + return; + } +} + +u32 spl_boot_mode(const u32 boot_device) +{ + return MMCSD_MODE_RAW; +} + +u32 spl_boot_device(void) +{ + return BOOT_DEVICE_MMC1; +} + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* Just empty function now - can't decide what to choose */ + debug("%s: %s\n", __func__, name); + + return 0; +} +#endif