From patchwork Mon Jul 24 09:45:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Yan X-Patchwork-Id: 792714 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3xGGn93MWkz9s3w for ; Mon, 24 Jul 2017 19:49:49 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 17B82C21DBF; Mon, 24 Jul 2017 09:47:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 09287C21D82; Mon, 24 Jul 2017 09:47:52 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B4381C21DAC; Mon, 24 Jul 2017 09:45:47 +0000 (UTC) Received: from regular1.263xmail.com (regular1.263xmail.com [211.150.99.132]) by lists.denx.de (Postfix) with ESMTPS id 4B8CDC21D97 for ; Mon, 24 Jul 2017 09:45:44 +0000 (UTC) Received: from andy.yan?rock-chips.com (unknown [192.168.167.192]) by regular1.263xmail.com (Postfix) with ESMTP id 40544951E; Mon, 24 Jul 2017 17:45:38 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id 60B6B364; Mon, 24 Jul 2017 17:45:38 +0800 (CST) X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: sjg@chromium.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: yxj@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 248438EFY6G; Mon, 24 Jul 2017 17:45:39 +0800 (CST) From: Andy Yan To: sjg@chromium.org, trini@konsulko.com, kever.yang@rock-chips.com, u-boot@lists.denx.de, noltari@gmail.com, daniel.schwierzeck@gmail.com, paul.burton@imgtec.com Date: Mon, 24 Jul 2017 17:45:27 +0800 Message-Id: <1500889527-26408-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1500889359-26293-1-git-send-email-andy.yan@rock-chips.com> References: <1500889359-26293-1-git-send-email-andy.yan@rock-chips.com> Cc: Andy Yan Subject: [U-Boot] [PATCH v3 02/10] mips: spl and normal u-boot stage set SYS_MALLOC_F_LEN indepently X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Some platforms has very small sram to run spl code, so it may have no enough sapce for so much malloc pool before relocation in spl stage as the normal u-boot stage. Use CONFIG_VAL(SYS_MALLOC_F_LEN) to fit this condition. Signed-off-by: Andy Yan Acked-by: Daniel Schwierzeck Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- Changes in v3: - use CONFIG_VAL(), which suggested by Simon Changes in v2: None arch/mips/cpu/start.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index d01ee9f..aa07654 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -60,8 +60,8 @@ sp, sp, GD_SIZE # reserve space for gd and sp, sp, t0 # force 16 byte alignment move k0, sp # save gd pointer -#ifdef CONFIG_SYS_MALLOC_F_LEN - li t2, CONFIG_SYS_MALLOC_F_LEN +#if CONFIG_VAL(SYS_MALLOC_F_LEN) + li t2, CONFIG_VAL(SYS_MALLOC_F_LEN) PTR_SUBU \ sp, sp, t2 # reserve space for early malloc and sp, sp, t0 # force 16 byte alignment @@ -75,7 +75,7 @@ blt t0, t1, 1b PTR_ADDIU t0, PTRSIZE -#ifdef CONFIG_SYS_MALLOC_F_LEN +#if CONFIG_VAL(SYS_MALLOC_F_LEN) PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset #endif .endm